component
SN65MLVD206DR
Public Made by Adomby adom
Texas Instruments LVDS ICs, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownSN65MLVD206DR
Texas Instruments · LVDS ICs · SOIC-8
SN65MLVD206DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | R | output | Receiver single-ended CMOS output (LVTTL). Drives VOH ≥ 2.4 V at IOH = -8 mA and VOL ≤ 0.4 V at IOL = 8 mA. Reflects the state of the differential A/B bus inputs when the receiver is enabled (RE = L). High-impedance when RE = H. |
| 2 | RE | input | Receiver enable, active-low CMOS input. Drive low to enable receiver output R; drive high to place R in the high-impedance state. VIH ≥ 2 V, VIL ≤ 0.8 V. |
| 3 | DE | input | Driver enable, active-high CMOS input. Drive high to enable the differential driver on pins A/B; drive low to place A/B in the high-impedance state. VIH ≥ 2 V, VIL ≤ 0.8 V. |
| 4 | D | input | Driver single-ended CMOS data input. Logic level applied here is transmitted differentially on the A/B bus pins when DE = H. VIH ≥ 2 V, VIL ≤ 0.8 V; input current 0-10 µA. |
| 5 | GND | power_in | Ground reference. All voltages are measured with respect to this pin. Connect to the board ground plane. |
| 6 | A | bidirectional | Non-inverting M-LVDS bus I/O. Driver output when DE = H ( |
| 7 | B | bidirectional | Inverting M-LVDS bus I/O. Driver output when DE = H (complement of A); receiver input otherwise. Common-mode input range -1.4 V to 3.8 V. High-impedance when driver is disabled or VCC ≤ 1.5 V. |
| 8 | VCC | power_in | Positive supply, 3.0 V to 3.6 V (3.3 V nominal). Bypass locally with a low-ESR ceramic capacitor to GND. Supply current is 22 mA typ (driver only), 16 mA typ (both enabled, receiver-only 4 mA typ). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Interface |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
SN65MLVD206DRDSN65MLVD206DR
CAD (KiCad official)
- Symbol:
SN65MLVD206DR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
sn65mlvd206dr-etched.step/sn65mlvd206dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn65mlvd206dr.step/sn65mlvd206dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
5073de1b180d3c83, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).