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sn65mlvd206dr: factory component page (tier=mfr)

Ray ·24aaad516b ·28d ago ·parent 7c62dd0
1 file changed +126−8
page.json+126−8
@@ -1,13 +1,136 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "sn65mlvd206dr",+  "title": "SN65MLVD206DR",+  "brief": "Texas Instruments LVDS ICs, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Texas Instruments LVDS ICs, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "interface",     "sn65mlvd206dr"   ],+  "component": {+    "mpn": "SN65MLVD206DR",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "Interface",+    "subcategory": "LVDS ICs",+    "datasheet": "https://www.ti.com/lit/ds/symlink/sn65mlvd206.pdf",+    "parts": {+      "symbol": "sn65mlvd206dr.kicad_sym",+      "footprint": "sn65mlvd206dr.kicad_mod",+      "model_3d": "sn65mlvd206dr.glb",+      "model_3d_step": "sn65mlvd206dr.step",+      "lbr": "sn65mlvd206dr.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "R",+        "type": "output",+        "description": "Receiver single-ended CMOS output (LVTTL). Drives VOH \u2265 2.4 V at IOH = -8 mA and VOL \u2264 0.4 V at IOL = 8 mA. Reflects the state of the differential A/B bus inputs when the receiver is enabled (RE = L). High-impedance when RE = H."+      },+      {+        "number": "2",+        "name": "RE",+        "type": "input",+        "description": "Receiver enable, active-low CMOS input. Drive low to enable receiver output R; drive high to place R in the high-impedance state. VIH \u2265 2 V, VIL \u2264 0.8 V."+      },+      {+        "number": "3",+        "name": "DE",+        "type": "input",+        "description": "Driver enable, active-high CMOS input. Drive high to enable the differential driver on pins A/B; drive low to place A/B in the high-impedance state. VIH \u2265 2 V, VIL \u2264 0.8 V."+      },+      {+        "number": "4",+        "name": "D",+        "type": "input",+        "description": "Driver single-ended CMOS data input. Logic level applied here is transmitted differentially on the A/B bus pins when DE = H. VIH \u2265 2 V, VIL \u2264 0.8 V; input current 0-10 \u00b5A."+      },+      {+        "number": "5",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference. All voltages are measured with respect to this pin. Connect to the board ground plane."+      },+      {+        "number": "6",+        "name": "A",+        "type": "bidirectional",+        "description": "Non-inverting M-LVDS bus I/O. Driver output when DE = H (|VAB| typ 480 mV, max 650 mV into 50 \u03a9, VOS \u2248 0.8-1.2 V); receiver input otherwise. Common-mode input range -1.4 V to 3.8 V. High-impedance when driver is disabled or VCC \u2264 1.5 V."+      },+      {+        "number": "7",+        "name": "B",+        "type": "bidirectional",+        "description": "Inverting M-LVDS bus I/O. Driver output when DE = H (complement of A); receiver input otherwise. Common-mode input range -1.4 V to 3.8 V. High-impedance when driver is disabled or VCC \u2264 1.5 V."+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply, 3.0 V to 3.6 V (3.3 V nominal). Bypass locally with a low-ESR ceramic capacitor to GND. Supply current is 22 mA typ (driver only), 16 mA typ (both enabled, receiver-only 4 mA typ)."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/sn65mlvd206.pdf",+        "pages": 31,+        "sha256": "5073de1b180d3c83",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Texas Instruments",+      "Package": "SOIC-8",+      "Category": "Interface",+      "Pins": "8"+    }+  },+  "variants": [+    {+      "mpn": "SN65MLVD206DRD",+      "kind": "packaging"+    },+    {+      "mpn": "SN65MLVD206DR",+      "kind": "packaging"+    }+  ],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "sn65mlvd206dr"+  ],+  "discovery_pitch": "SN65MLVD206DR (Texas Instruments) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +148,5 @@     "docs/sn65mlvd206dr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file