component
SN65LVDS3486BDR
Public Made by Adomby adom
Texas Instruments LVDS ICs, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
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{
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"description": "Non-inverting differential receiver input A for channel 2; the bus terminal voltage is recommended to stay between -2 V and 4.4 V, and |VA - VB| must be 0.1 V to 3 V for LVDS signaling."
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{
"number": "7",
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{
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{
"number": "10",
"name": "3A",
"type": "input",
"description": "Non-inverting differential receiver input A for channel 3; the bus terminal voltage is recommended to stay between -2 V and 4.4 V, and |VA - VB| must be 0.1 V to 3 V for LVDS signaling."
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{
"number": "11",
"name": "3Y",
"type": "output",
"description": "Channel 3 receiver output, which reaches at least 2.4 V high at -4 mA and at most 0.4 V low at 4 mA, and goes high-impedance when the enable is low."
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{
"number": "12",
"name": "3,4EN",
"type": "input",
"description": "Active-high enable for receivers 3 and 4, with VIH of at least 2 V and VIL of at most 0.8 V; unused enables should be tied to VCC or GND."
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{
"number": "13",
"name": "4Y",
"type": "output",
"description": "Channel 4 receiver output, which reaches at least 2.4 V high at -4 mA and at most 0.4 V low at 4 mA, and goes high-impedance when the enable is low."
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{
"number": "14",
"name": "4A",
"type": "input",
"description": "Non-inverting differential receiver input A for channel 4; the bus terminal voltage is recommended to stay between -2 V and 4.4 V, and |VA - VB| must be 0.1 V to 3 V for LVDS signaling."
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{
"number": "15",
"name": "4B",
"type": "input",
"description": "Inverting differential receiver input B for channel 4; the bus terminal voltage is recommended to stay between -2 V and 4.4 V, with absolute limits of -4 V to 6 V."
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{
"number": "16",
"name": "VCC",
"type": "power_in",
"description": "Supply voltage of 3 V to 3.6 V (3.3 V nominal), with an absolute maximum range of -0.5 V to 4 V."
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