SN65LVDS2D

{
  "schema_version": 1,
  "type": "component",
  "slug": "sn65lvds2d",
  "title": "SN65LVDS2D",
  "brief": "Texas Instruments LVDS ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
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    "interface",
    "sn65lvds2d",
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    "extractor-text"
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  "component": {
    "mpn": "SN65LVDS2D",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Interface",
    "subcategory": "LVDS ICs",
    "datasheet": "https://www.ti.com/cn/lit/gpn/sn65lvds1",
    "parts": {
      "symbol": "sn65lvds2d.kicad_sym",
      "footprint": "sn65lvds2d.kicad_mod",
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      "model_3d_plain": "sn65lvds2d.glb",
      "model_3d_step": "sn65lvds2d-etched.step",
      "model_3d_step_plain": "sn65lvds2d.step",
      "lbr": "sn65lvds2d.lbr"
    },
    "distributor_links": {
      "lcsc": "C2872842",
      "digikey": "296-12139-5-ND",
      "mouser": "595-SN65LVDS2D"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T00:23:33Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-12139-5-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "595-SN65LVDS2D",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "B",
        "type": "input",
        "description": "Inverting LVDS receiver input that accepts differential signals with a ±100 mV threshold, up to 600 mV differential, within a common-mode range of 0 V to VCC - 0.8 V."
      },
      {
        "number": "2",
        "name": "A",
        "type": "input",
        "description": "Non-inverting LVDS receiver input that accepts differential signals with a ±100 mV threshold, up to 600 mV differential, within a common-mode range of 0 V to VCC - 0.8 V."
      },
      {
        "number": "3",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection to the lead frame or die; the datasheet recommends grounding NC pins at board level for thermal performance."
      },
      {
        "number": "4",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection to the lead frame or die; the datasheet recommends grounding NC pins at board level for thermal performance."
      },
      {
        "number": "5",
        "name": "GND",
        "type": "power_in",
        "description": "Device ground reference for the supply and all signal voltages."
      },
      {
        "number": "6",
        "name": "NC",
        "type": "unconnected",
        "description": "No internal connection to the lead frame or die; the datasheet recommends grounding NC pins at board level for thermal performance."
      },
      {
        "number": "7",
        "name": "R",
        "type": "output",
        "description": "LVTTL receiver output; VOH is at least 2.4 V at IOH = -8 mA with VCC = 3 V (1.9 V minimum for 2.6 V to 3.0 V supply), and absolute maximum output current is ±12 mA."
      },
      {
        "number": "8",
        "name": "VCC",
        "type": "power_in",
        "description": "Single supply input, recommended 2.4 V to 3.6 V (3.3 V nominal) with absolute maximum rating of 4 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Table 5-2 lists A and B with I/O type 'I' but the description column in the Chinese text calls them ; The pinout comes from Table 5-2 (D column) on page 4 and the D package top view on page 3, and match; The datasheet's integrated 110-ohm termination applies only to SN65LVDT2. The SN65LVDS2D (no termina"
        ],
        "pages_sent": 23,
        "cost_usd": 0.1333,
        "at": "2026-10-08T00:23:17"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/sn65lvds1",
        "pages": 44,
        "sha256": "f1b54d3df301bfab",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
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      "footprint": "viewers/footprint.html"
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          4.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn65lvds2d-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
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        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "6fc3a23980769e09c0aba4b1ad7621e39fa493e56de78be1bf234e349909fb43",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "SOIC-8",
      "Category": "Interface",
      "Pins": "8"
    }
  },
  "variants": [],
  "sections": [
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    "readme",
    "breadcrumbs",
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  "discovery_triggers": [
    "sn65lvds2d"
  ],
  "discovery_pitch": "SN65LVDS2D (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
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    "path": "docs/hero.png"
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}