component
SN65LVDS048APW
Public Made by Adomby adom
Texas Instruments LVDS ICs, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"manufacturer": "Texas Instruments",
"package": "TSSOP-16",
"pin_count": 16,
"category": "Interface",
"subcategory": "LVDS ICs",
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"digikey": "296-6912-5-ND",
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"pins": [
{
"number": "1",
"name": "RIN1–",
"type": "input",
"description": "Receiver 1 inverting LVDS differential input; valid output for |VID| ≥ 100 mV within common-mode range, input range GND to 3 V."
},
{
"number": "2",
"name": "RIN1+",
"type": "input",
"description": "Receiver 1 non-inverting LVDS differential input; valid output for |VID| ≥ 100 mV within common-mode range, input range GND to 3 V."
},
{
"number": "3",
"name": "RIN2+",
"type": "input",
"description": "Receiver 2 non-inverting LVDS differential input; valid output for |VID| ≥ 100 mV within common-mode range, input range GND to 3 V."
},
{
"number": "4",
"name": "RIN2–",
"type": "input",
"description": "Receiver 2 inverting LVDS differential input; valid output for |VID| ≥ 100 mV within common-mode range, input range GND to 3 V."
},
{
"number": "5",
"name": "RIN3–",
"type": "input",
"description": "Receiver 3 inverting LVDS differential input; valid output for |VID| ≥ 100 mV within common-mode range, input range GND to 3 V."
},
{
"number": "6",
"name": "RIN3+",
"type": "input",
"description": "Receiver 3 non-inverting LVDS differential input; valid output for |VID| ≥ 100 mV within common-mode range, input range GND to 3 V."
},
{
"number": "7",
"name": "RIN4+",
"type": "input",
"description": "Receiver 4 non-inverting LVDS differential input; valid output for |VID| ≥ 100 mV within common-mode range, input range GND to 3 V."
},
{
"number": "8",
"name": "RIN4–",
"type": "input",
"description": "Receiver 4 inverting LVDS differential input; valid output for |VID| ≥ 100 mV within common-mode range, input range GND to 3 V."
},
{
"number": "9",
"name": "EN̅",
"type": "input",
"description": "Active-low receiver enable input; outputs are enabled when EN is high or EN̅ is low, with VIH 2.0 V min and VIL 0.8 V max."
},
{
"number": "10",
"name": "ROUT4",
"type": "tri_state",
"description": "Receiver 4 LVCMOS output, 3-state when disabled; VOH 2.7 V min at IOH = -0.4 mA, VOL 0.25 V max at IOL = 2 mA."
},
{
"number": "11",
"name": "ROUT3",
"type": "tri_state",
"description": "Receiver 3 LVCMOS output, 3-state when disabled; VOH 2.7 V min at IOH = -0.4 mA, VOL 0.25 V max at IOL = 2 mA."
},
{
"number": "12",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "13",
"name": "VCC",
"type": "power_in",
"description": "Supply voltage pin, 3 V to 3.6 V recommended (3.3 V nominal), absolute maximum 4 V."
},
{
"number": "14",
"name": "ROUT2",
"type": "tri_state",
"description": "Receiver 2 LVCMOS output, 3-state when disabled; VOH 2.7 V min at IOH = -0.4 mA, VOL 0.25 V max at IOL = 2 mA."
},
{
"number": "15",
"name": "ROUT1",
"type": "tri_state",
"description": "Receiver 1 LVCMOS output, 3-state when disabled; VOH 2.7 V min at IOH = -0.4 mA, VOL 0.25 V max at IOL = 2 mA."
},
{
"number": "16",
"name": "EN",
"type": "input",
"description": "Active-high receiver enable input; outputs are enabled when EN is high, with VIH 2.0 V min and VIL 0.8 V max."
}
],
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"primary_model": "claude-haiku-4-5-20251001",
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"guards": "pin_guards 0.1: passed",
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"extractor flagged: Pinout diagram on page 1 shows only partial labels for the right-side pins (16-9). The differential "
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"cost_usd": 0.2186,
"at": "2026-10-07T08:24:32"
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"pages": 15,
"sha256": "7708d93a62e38923",
"source_tier": "mfr"
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"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 16,
"described": 16,
"cites_pages": true,
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