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SN65LVDS048APW

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Texas Instruments LVDS ICs, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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SN65LVDS048APW

Texas Instruments · LVDS ICs · TSSOP-16

SN65LVDS048APW from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RIN1- input Receiver 1 inverting LVDS differential input; valid output for
2 RIN1+ input Receiver 1 non-inverting LVDS differential input; valid output for
3 RIN2+ input Receiver 2 non-inverting LVDS differential input; valid output for
4 RIN2- input Receiver 2 inverting LVDS differential input; valid output for
5 RIN3- input Receiver 3 inverting LVDS differential input; valid output for
6 RIN3+ input Receiver 3 non-inverting LVDS differential input; valid output for
7 RIN4+ input Receiver 4 non-inverting LVDS differential input; valid output for
8 RIN4- input Receiver 4 inverting LVDS differential input; valid output for
9 EN̅ input Active-low receiver enable input; outputs are enabled when EN is high or EN̅ is low, with VIH 2.0 V min and VIL 0.8 V max.
10 ROUT4 tri_state Receiver 4 LVCMOS output, 3-state when disabled; VOH 2.7 V min at IOH = -0.4 mA, VOL 0.25 V max at IOL = 2 mA.
11 ROUT3 tri_state Receiver 3 LVCMOS output, 3-state when disabled; VOH 2.7 V min at IOH = -0.4 mA, VOL 0.25 V max at IOL = 2 mA.
12 GND power_in Ground reference for the device.
13 VCC power_in Supply voltage pin, 3 V to 3.6 V recommended (3.3 V nominal), absolute maximum 4 V.
14 ROUT2 tri_state Receiver 2 LVCMOS output, 3-state when disabled; VOH 2.7 V min at IOH = -0.4 mA, VOL 0.25 V max at IOL = 2 mA.
15 ROUT1 tri_state Receiver 1 LVCMOS output, 3-state when disabled; VOH 2.7 V min at IOH = -0.4 mA, VOL 0.25 V max at IOL = 2 mA.
16 EN input Active-high receiver enable input; outputs are enabled when EN is high, with VIH 2.0 V min and VIL 0.8 V max.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Interface
Pins 16

CAD (KiCad official)

  • Symbol: SN65LVDS048APW
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: sn65lvds048apw-etched.step / sn65lvds048apw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65lvds048apw.step / sn65lvds048apw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (15 pp, sha256 7708d93a62e38923, retrieved 2026-10-07, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF