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SN65LVDM31DR

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Texas Instruments LVDS ICs, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN65LVDM31DR

Texas Instruments · LVDS ICs · SOIC-16

SN65LVDM31DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Driver 1 LVCMOS logic input, 5-V tolerant, with VIH min 2.0 V and VIL max 0.8 V.
2 1Y output Driver 1 non-inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω.
3 1Z output Driver 1 inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω.
4 G input Active-high enable input for drivers 1 and 2, 5-V tolerant LVCMOS input (outputs enabled when G is high or the complementary enable is low).
5 2Z output Driver 2 inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω.
6 2Y output Driver 2 non-inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω.
7 2A input Driver 2 LVCMOS logic input, 5-V tolerant, with VIH min 2.0 V and VIL max 0.8 V.
8 GND power_in Ground reference for the device, which is also an ESD-protected pin rated Class 3, A: 12 kV.
9 3A input Driver 3 LVCMOS logic input, 5-V tolerant, with VIH min 2.0 V and VIL max 0.8 V.
10 3Y output Driver 3 non-inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω.
11 3Z output Driver 3 inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω.
12 G input Active-low enable input (G with overbar) for drivers 3 and 4, 5-V tolerant LVCMOS input (outputs enabled when it is low or the active-high enable is high).
13 4Z output Driver 4 inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω.
14 4Y output Driver 4 non-inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω.
15 4A input Driver 4 LVCMOS logic input, 5-V tolerant, with VIH min 2.0 V and VIL max 0.8 V.
16 VCC power_in Single 3.3-V supply with recommended range 3 V to 3.6 V and absolute maximum of 4 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Interface
Pins 16

CAD (KiCad official)

  • Symbol: SN65LVDM31DR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: sn65lvdm31dr-etched.step / sn65lvdm31dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65lvdm31dr.step / sn65lvdm31dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (13 pp, sha256 5ba6f7db1dadee22, retrieved 2026-10-07, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF