component
SN65LVDM31DR
Public Made by Adomby adom
Texas Instruments LVDS ICs, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# SN65LVDM31DR++**Texas Instruments** · LVDS ICs · SOIC-16++SN65LVDM31DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1A | input | Driver 1 LVCMOS logic input, 5-V tolerant, with VIH min 2.0 V and VIL max 0.8 V. |+| 2 | 1Y | output | Driver 1 non-inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω. |+| 3 | 1Z | output | Driver 1 inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω. |+| 4 | G | input | Active-high enable input for drivers 1 and 2, 5-V tolerant LVCMOS input (outputs enabled when G is high or the complementary enable is low). |+| 5 | 2Z | output | Driver 2 inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω. |+| 6 | 2Y | output | Driver 2 non-inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω. |+| 7 | 2A | input | Driver 2 LVCMOS logic input, 5-V tolerant, with VIH min 2.0 V and VIL max 0.8 V. |+| 8 | GND | power_in | Ground reference for the device, which is also an ESD-protected pin rated Class 3, A: 12 kV. |+| 9 | 3A | input | Driver 3 LVCMOS logic input, 5-V tolerant, with VIH min 2.0 V and VIL max 0.8 V. |+| 10 | 3Y | output | Driver 3 non-inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω. |+| 11 | 3Z | output | Driver 3 inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω. |+| 12 | G | input | Active-low enable input (G with overbar) for drivers 3 and 4, 5-V tolerant LVCMOS input (outputs enabled when it is low or the active-high enable is high). |+| 13 | 4Z | output | Driver 4 inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω. |+| 14 | 4Y | output | Driver 4 non-inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω. |+| 15 | 4A | input | Driver 4 LVCMOS logic input, 5-V tolerant, with VIH min 2.0 V and VIL max 0.8 V. |+| 16 | VCC | power_in | Single 3.3-V supply with recommended range 3 V to 3.6 V and absolute maximum of 4 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Interface |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `SN65LVDM31DR`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `sn65lvdm31dr-etched.step` / `sn65lvdm31dr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn65lvdm31dr.step` / `sn65lvdm31dr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn65lvdm31.pdf) (13 pp, sha256 `5ba6f7db1dadee22`, retrieved 2026-10-07, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn65lvdm31dr-datasheet.pdf)
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"model_3d_step": "sn65lvdm31dr-etched.step",+ "model_3d_step_plain": "sn65lvdm31dr.step",+ "lbr": "sn65lvdm31dr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2672235",+ "digikey": "SN65LVDM31DR-ND",+ "mouser": "595-SN65LVDM31DR"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T02:05:45Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "SN65LVDM31DR-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-SN65LVDM31DR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "1A",+ "type": "input",+ "description": "Driver 1 LVCMOS logic input, 5-V tolerant, with VIH min 2.0 V and VIL max 0.8 V."+ },+ {+ "number": "2",+ "name": "1Y",+ "type": "output",+ "description": "Driver 1 non-inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω."+ },+ {+ "number": "3",+ "name": "1Z",+ "type": "output",+ "description": "Driver 1 inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω."+ },+ {+ "number": "4",+ "name": "G",+ "type": "input",+ "description": "Active-high enable input for drivers 1 and 2, 5-V tolerant LVCMOS input (outputs enabled when G is high or the complementary enable is low)."+ },+ {+ "number": "5",+ "name": "2Z",+ "type": "output",+ "description": "Driver 2 inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω."+ },+ {+ "number": "6",+ "name": "2Y",+ "type": "output",+ "description": "Driver 2 non-inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω."+ },+ {+ "number": "7",+ "name": "2A",+ "type": "input",+ "description": "Driver 2 LVCMOS logic input, 5-V tolerant, with VIH min 2.0 V and VIL max 0.8 V."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference for the device, which is also an ESD-protected pin rated Class 3, A: 12 kV."+ },+ {+ "number": "9",+ "name": "3A",+ "type": "input",+ "description": "Driver 3 LVCMOS logic input, 5-V tolerant, with VIH min 2.0 V and VIL max 0.8 V."+ },+ {+ "number": "10",+ "name": "3Y",+ "type": "output",+ "description": "Driver 3 non-inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω."+ },+ {+ "number": "11",+ "name": "3Z",+ "type": "output",+ "description": "Driver 3 inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω."+ },+ {+ "number": "12",+ "name": "G",+ "type": "input",+ "description": "Active-low enable input (G with overbar) for drivers 3 and 4, 5-V tolerant LVCMOS input (outputs enabled when it is low or the active-high enable is high)."+ },+ {+ "number": "13",+ "name": "4Z",+ "type": "output",+ "description": "Driver 4 inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω."+ },+ {+ "number": "14",+ "name": "4Y",+ "type": "output",+ "description": "Driver 4 non-inverting differential line output, high-impedance when disabled, with 540 mV minimum differential output into 100 Ω."+ },+ {+ "number": "15",+ "name": "4A",+ "type": "input",+ "description": "Driver 4 LVCMOS logic input, 5-V tolerant, with VIH min 2.0 V and VIL max 0.8 V."+ },+ {+ "number": "16",+ "name": "VCC",+ "type": "power_in",+ "description": "Single 3.3-V supply with recommended range 3 V to 3.6 V and absolute maximum of 4 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Enable control logic for dual G pins requires clarification: the function table (Page 1) shows behav"+ ],+ "pages_sent": 13,+ "cost_usd": 0.1233,+ "at": "2026-10-07T02:05:27"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/sn65lvdm31.pdf",+ "pages": 13,+ "sha256": "5ba6f7db1dadee22",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "sn65lvdm31dr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 9.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "sn65lvdm31dr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 9.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b65109c33adbf1da732d555fa54b0c2ba0419a50a7a0e01d51f01a81ffc27eec",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}