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SN65LV1224BMDBREP

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Texas Instruments Serializers, Deserializers, SSOP-28-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN65LV1224BMDBREP

Texas Instruments · Serializers, Deserializers · SSOP-28-208mil

SN65LV1224BMDBREP from Texas Instruments, in a SSOP-28-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AGND power_in Analog circuit ground for the PLL and analog circuits.
2 RCLK_R/F input LVTTL logic input; low selects an RCLK falling-edge data strobe and high selects an RCLK rising-edge data strobe.
3 REFCLK input LVTTL logic input that supplies the reference clock for the internal PLL frequency; a local clock must be applied to this pin for the deserializer PLL to initialize.
4 AVCC power_in Analog circuit power supply for the PLL and analog circuits; DVCC and AVCC must each be within 3 V to 3.6 V.
5 RI+ input Noninverting LVDS differential serial data input.
6 RI- input Inverting LVDS differential serial data input.
7 PWRDN input LVTTL logic input; asserting it low turns off the PLL and places the outputs into high-impedance for low-power mode, and it must be held low for a minimum of 16 ns to initiate power down.
8 REN input LVTTL logic input; driving it low places ROUT0-ROUT9 and RCLK into the high-impedance state.
9 RCLK output LVTTL-level recovered clock output used to strobe ROUTx; it is 3-stated when REN is low or LOCK is high.
10 LOCK output LVTTL-level output that goes low when the deserializer PLL locks onto the embedded clock edge; ROUT data is valid only while LOCK is low.
11 AVCC power_in Analog circuit power supply for the PLL and analog circuits; DVCC and AVCC must each be within 3 V to 3.6 V.
12 AGND power_in Analog circuit ground for the PLL and analog circuits.
13 AGND power_in Analog circuit ground for the PLL and analog circuits.
14 DGND power_in Digital circuit ground.
15 ROUT9 tri_state LVTTL parallel data output bit 9, valid when LOCK is low and strobed by RCLK; 3-stated when REN is low.
16 ROUT8 tri_state LVTTL parallel data output bit 8, valid when LOCK is low and strobed by RCLK; 3-stated when REN is low.
17 ROUT7 tri_state LVTTL parallel data output bit 7, valid when LOCK is low and strobed by RCLK; 3-stated when REN is low.
18 ROUT6 tri_state LVTTL parallel data output bit 6, valid when LOCK is low and strobed by RCLK; 3-stated when REN is low.
19 ROUT5 tri_state LVTTL parallel data output bit 5, valid when LOCK is low and strobed by RCLK; 3-stated when REN is low.
20 DGND power_in Digital circuit ground.
21 DVCC power_in Digital circuit power supply; DVCC and AVCC must each be within 3 V to 3.6 V.
22 DGND power_in Digital circuit ground.
23 DVCC power_in Digital circuit power supply; DVCC and AVCC must each be within 3 V to 3.6 V.
24 ROUT4 tri_state LVTTL parallel data output bit 4, valid when LOCK is low and strobed by RCLK; 3-stated when REN is low.
25 ROUT3 tri_state LVTTL parallel data output bit 3, valid when LOCK is low and strobed by RCLK; 3-stated when REN is low.
26 ROUT2 tri_state LVTTL parallel data output bit 2, valid when LOCK is low and strobed by RCLK; 3-stated when REN is low.
27 ROUT1 tri_state LVTTL parallel data output bit 1, valid when LOCK is low and strobed by RCLK; 3-stated when REN is low.
28 ROUT0 tri_state LVTTL parallel data output bit 0, valid when LOCK is low and strobed by RCLK; 3-stated when REN is low.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SSOP-28-208mil
Category Interface
Pins 28

CAD (KiCad official)

  • Symbol: SN65LV1224BMDBREP
  • Footprint: Package_SO:SSOP-28_5.3x10.2mm_P0.65mm
  • 3D model: SSOP-28-208mil (KiCad packages3D, STEP)
  • 3D model files: sn65lv1224bmdbrep-etched.step / sn65lv1224bmdbrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65lv1224bmdbrep.step / sn65lv1224bmdbrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (29 pp, sha256 2c0fadd4093ca5b1, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF