component
SN65HVDA100QDRQ1
Public Made by Adomby adom
Texas Instruments LIN Transceivers, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN65HVDA100QDRQ1
Texas Instruments · LIN Transceivers · SOIC-8
SN65HVDA100QDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RXD | output | Open-drain output reporting LIN bus state (high for recessive near VSUP, low for dominant near ground) with output voltage range -0.3V to 5.5V and 3.5 mA output current capability at 0.4V. |
| 2 | EN | input | Enable input with VIL -0.3 to 0.8V (sleep mode) and VIH 2 to 5.5V (normal mode); internal pull-down resistor (125-800 kΩ) ensures sleep mode when floating. |
| 3 | NWake | input | High-voltage local wake-up input accepting -0.3V to 45V with low signal (<VSUP-3.3V) asserted longer than filter time tNWake (25-150 μs) triggering wake-up from sleep mode. |
| 4 | TXD | input | Transmit input with VIL -0.3 to 0.8V (produces dominant state) and VIH 2 to 5.5V (produces recessive state); threshold hysteresis 30-500 mV and internal pull-down resistor (125-800 kΩ). |
| 5 | GND | power_in | Ground connection reference point; device operates with ground shift as long as VSUP remains above 4.35V minimum operating threshold. |
| 6 | LIN | bidirectional | LIN bus single-wire bidirectional transceiver accepting -27V to 45V with integrated 30 kΩ responder termination and series diode, ratiometric receiver thresholds (0.4×VSUP dominant, 0.6×VSUP recessive), and ±12 kV HBM ESD protection. |
| 7 | VSUP | power_in | Device supply voltage with 5V to 27V operating range, absolute maximum -0.3V to 45V, 4.35V undervoltage threshold with 0.2V hysteresis, and supplies internal 30 kΩ LIN termination resistor. |
| 8 | INH | output | Inhibit output with RDS(on) 25-50 Ω providing low-impedance drive to VSUP in normal and standby modes, high-impedance in sleep mode for external voltage regulator control. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Interface |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
SN65HVDA100QDRQ1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
sn65hvda100qdrq1-etched.step/sn65hvda100qdrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn65hvda100qdrq1.step/sn65hvda100qdrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (32 pp, sha256
1512f6ab6c692743, retrieved 2026-09-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).