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SN65HVD72EIM

HGSEMI · RS-485 / RS-422 ICs · SOP-8

SN65HVD72EIM from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	RO	output	Receiver output: with RE low, RO is high when A-B is at least 200mV and low when A-B is at most -200mV (the datasheet's function table lists the -50mV threshold for RO high, with RO high-impedance when RE is high).
2	RE	input	Receiver output enable, active low: RO is enabled when RE is low and high-impedance when RE is high; RE high with DE low puts the device into low-power shutdown.
3	DE	input	Driver output enable: the driver outputs are active when DE is high and high-impedance when DE is low; DE has a hot-plug input structure and DE low with RE high enters low-power shutdown.
4	DI	input	Driver input: with DE high, a low on DI drives output A low and B high, and a high on DI drives A high and B low.
5	GND	power_in	Ground reference for the device.
6	A	bidirectional	Non-inverting receiver input and non-inverting driver output on the RS-485 bus; the bus pins are ESD protected to ±16kV (IEC 61000-4-2 contact and air-gap, ±16kV HBM).
7	B	bidirectional	Inverting receiver input and inverting driver output on the RS-485 bus; the bus pins are ESD protected to ±16kV (IEC 61000-4-2 contact and air-gap, ±16kV HBM).
8	VCC	power_in	Positive supply: 3.15V ≤ VCC ≤ 3.45V, with a 0.1µF capacitor to ground recommended.

Key specifications

Parameter	Value
Manufacturer	HGSEMI
Package	SOP-8
Category	Interface
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage (absolute maximum)	VCC			6	V		4
Control input voltage	RE, DE	-0.3		6	V		4
Driver input voltage	DI	-0.3		6	V		4
Driver output voltage	A,B	-7		12	V		4
Receiver input voltage	A,B	-7		12	V		4
Receiver output voltage	RO	-0.3			V	Printed max is VCC+0.3 V (not numeric)	4
Continuous power dissipation, 8SOP				500	mW	TA=+70℃	4
Operating temperature range, SN65HVDxxEI (industrial)		-40		85	℃	SN65HVDxxEI	4
Storage temperature		-65		150	℃		4
Lead temperature (soldering)	TLEAD			260	℃	Soldering 10 s	4
Supply voltage (recommended)	VCC	3.15		3.45	V		4
Differential driver output voltage, RS-422 load	VOD	2			V	Fig 1, RL=100Ω (RS-422); printed max is VCC (not numeric)	4
Differential driver output voltage, RS-485 load	VOD	1.5			V	Fig 1, RL=54Ω (RS-485); printed max is VCC (not numeric)	4
Change in magnitude of differential driver output voltage	ΔVOD			0.2	V	Fig 1, RL=100Ω or RL=54Ω	4
Driver common-mode output voltage	VOC			3	V	Fig 1, RL=100Ω or RL=54Ω	4
Change in magnitude of common-mode output voltage	ΔVOC			0.2	V	Fig 1, RL=100Ω or RL=54Ω	4
Input high voltage	VIH	2			V	DE, DI, garbled pin (RE)	5
Input low voltage	VIL			0.8	V	DE, DI	5
Input current	IIN	-1		1	μA	DE, DI, garbled pin (RE)	5
Input current (A, B), full duplex	IA, IB			125	μA	DE=GND, VCC=GND or VCC, VIN=12V	5
Input current (A, B), full duplex	IA, IB	-75			μA	DE=GND, VCC=GND or VCC, VIN=-7V	5
Output leakage current (Y, Z), full duplex	IO			125	μA	DE=GND, VCC=GND or VCC, VIN=12V	5
Output leakage current (Y, Z), full duplex	IO	-100			μA	DE=GND, VCC=GND or VCC, VIN=-7V	5
Driver short-circuit output current	IOSD			250	mA	0≤VOUT≤12V	5
Driver short-circuit output current	IOSD	-250			mA	-7≤VOUT≤VCC	5
Driver short-circuit foldback output current	IOSDF			20	mA	VCC-1V≤VOUT≤VCC+0.5V	5
Driver short-circuit foldback output current	IOSDF	-20			mA	-0.5V≤VOUT≤+1V	5
Receiver differential threshold voltage	VTH	-200	-125	-50	mV	-7V≤VCM≤12V	5
Receiver output low voltage	VOL			0.4	V	IO=4mA, VID=-200mV	5
Receiver tri-state output current	IOZR	-1		1	μA	0≤VO≤VCC	5
Receiver input resistance	RIN	96			kΩ	-7V≤VCM≤12V	5
Receiver output short-circuit current	IOSR	7		95	mA	0V≤VRO≤VCC; printed as ±7 and ±95 mA	5
Supply current, no load, DE=VCC	Icc		400	900	μA	No load; RE=VCC; DI=GND or VCC; DE=VCC	6
Supply current, no load, DE=GND	Icc		330	600	μA	No load; RE=VCC; DI=GND or VCC; DE=GND	6
Supply current, no load, DE=VCC (RE=GND)	Icc		400	1000	μA	No load; RE=GND; DI=GND or VCC; DE=VCC	6
Supply current, no load, DE=GND (RE=GND)	Icc		330	800	μA	No load; RE=GND; DI=GND or VCC; DE=GND	6
Standby mode supply current	ISHDN		0.05	10	μA	DE=GND, RE=VCC	6
Driver propagation delay, low-to-high	tDPLH	500		2600	ns	Fig 2 and 5, RL=54Ω, CL=50pF	6
Driver propagation delay, high-to-low	tDPHL	500		2600	ns	Fig 2 and 5, RL=54Ω, CL=50pF	6
Driver output skew	/tDPLH-tDPHL/	-200		200	ns	Fig 2 and 5, RL=54Ω, CL=50pF	6
Driver rise and fall time	tDR, tDF	650		2500	ns	Fig 2 and 5, RL=54Ω, CL=50pF	6
Maximum data rate, driver (115 kbps part)	fMAX			115	kbps		6
Driver enable to output high	tDZH			3500	ns	Fig 3 and 6, CL=100pF, S3 closed	6
Driver enable to output low	tDZL			3500	ns	Fig 3 and 6, CL=100pF, S2 closed	7
Driver low to disable time	tDLZ			100	ns	Fig 3 and 6, CL=15pF, S2 closed	7
Driver high to disable time	tDHZ			100	ns	Fig 3 and 6, CL=15pF, S3 closed	7
Driver enable from standby to output high	tDZH(SHDN)			5500	ns	Fig 3 and 6, CL=15pF, S3 closed	7
Driver enable from standby to output low	tDZL(SHDN)			5500	ns	Fig 3 and 6, CL=15pF, S2 closed	7
Standby time, driver	tSHDN	50	350	700	ns	Note 4	7
Receiver propagation delay	tRPLH, tRPHL			200	ns	Fig 7 and 8, CL=15pF, /VID/≥2.0V, VID≤15ns	7
Receiver output skew	/tRPLH-tRPHL/	-30		30	ns	Fig 7 and 8, CL=15pF, /VID/≥2.0V, VID≤15ns	7
Maximum data rate, receiver (115 kbps part)	fMAX			115	kbps		7
Receiver enable to output low	tRZL			50	ns	Fig 4 and 9, S1=-1.5V, S2 to VCC	7
Receiver enable to output high	tRZH			50	ns	Fig 4 and 9, S1=+1.5V, S2 to GND	7
Receiver low to disable time	tRLZ			50	ns	Fig 4 and 9, S1=-1.5V, S2 to VCC	7
Receiver high to disable time	tRHZ			50	ns	Fig 4 and 9, S1=+1.5V, S2 to GND	7
Receiver enable from standby to output high	tRZH(SHDN)			5500	ns	Fig 4 and 9, S1=-1.5V, S2 to VCC	7
Receiver enable from standby to output low	tRZL(SHDN)			5500	ns	Fig 4 and 9, S1=+1.5V, S2 to GND	7
Standby time, receiver	tSHDN	50		700	ns	Note 4	7

CAD (KiCad official)

Symbol: SN65HVD72EIM
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)
3D model files: sn65hvd72eim-etched.step / sn65hvd72eim-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65hvd72eim.step / sn65hvd72eim.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: HGSEMI datasheet (20 pp, sha256 81ed86cf3caebd1f, retrieved 2026-10-18, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF