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docs sn65hvd3082edgkr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json sn65hvd3082edgkr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md sn65hvd3082edgkr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
sn65hvd3082edgkr-etched.fit.json sn65hvd3082edgkr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn65hvd3082edgkr-etched.glb sn65hvd3082edgkr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn65hvd3082edgkr-etched.step sn65hvd3082edgkr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
sn65hvd3082edgkr.glb Publish 0.1.0 · Ray
sn65hvd3082edgkr.kicad_mod Publish 0.1.0 · Ray
sn65hvd3082edgkr.kicad_sym Publish 0.1.0 · Ray
sn65hvd3082edgkr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
sn65hvd3082edgkr.step Publish 0.1.0 · Ray

SN65HVD3082EDGKR

Texas Instruments · RS-485 / RS-422 ICs · VSSOP-8-0.65mm

SN65HVD3082EDGKR from Texas Instruments, in a VSSOP-8-0.65mm. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 R output Receiver data output. CMOS-level digital output that reproduces the differential bus state seen at pins A/B; fail-safe HIGH when the bus is open, shorted, or idle.
2 RE input Receiver enable, active-low digital input. Drive LOW to enable the receiver output R; drive HIGH to place R in high-impedance. Tying RE HIGH while DE is LOW puts the device in low-current shutdown (~1 nA).
3 DE input Driver enable, active-high digital input. Drive HIGH to enable the differential driver on A/B; LOW places the driver outputs in high-impedance.
4 D input Driver data input. CMOS-level digital input; when the driver is enabled, a HIGH on D drives A>B and a LOW drives B>A on the RS-485 bus.
5 GND power_in Local device ground / reference potential for VCC and all logic-side signals.
6 A bidirectional RS-485 differential bus pin A (non-inverting). Driver output or receiver input, complementary to B. Rated for -9 V to +14 V DC and ±50 V transient (through 100 Ω), with ±15 kV HBM ESD.
7 B bidirectional RS-485 differential bus pin B (inverting). Driver output or receiver input, complementary to A. Rated for -9 V to +14 V DC and ±50 V transient (through 100 Ω), with ±15 kV HBM ESD.
8 VCC power_in Positive supply input, 4.5 V to 5.5 V. Bypass locally to GND with a 100-nF ceramic capacitor.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VSSOP-8-0.65mm
Category Interface
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • SN65HVD3082EDGKR
  • SN65HVD3082EDGKRD
  • SN65HVD3082EDGKRDR
  • SN65HVD3082EDGKRP

CAD (KiCad official)

  • Symbol: SN65HVD3082EDGKR
  • Footprint: Package_SO:VSSOP-8_2.3x2mm_P0.5mm
  • 3D model: VSSOP-8-0.65mm (KiCad packages3D, STEP)
  • 3D model files: sn65hvd3082edgkr-etched.step / sn65hvd3082edgkr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65hvd3082edgkr.step / sn65hvd3082edgkr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (40 pp, sha256 5da24ada598efdc4, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF