component

SMUN5114DW1T1G

Public Made by Adom

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onsemi Digital Transistors, SOT-363-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttriode-mos tube-transistorsmun5114dw1t1gfactory-2.0.0extractor-text

Verified SMUN5114DW1T1G

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 6 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SMUN5114DW1T1G · SOT-363-6 · 6 pins
  • ✓copper: 6 copper pads, none touching another net
  • •datasheet (warn): 1/6 pin names appear NOWHERE in the datasheet text: ['5:B1@p1']
  • ✓distributor: lcsc C894391, digikey SMUN5114DW1T1GOSTR-ND, mouser 863-SMUN5114DW1T1G
  • ✓family: SOT-363_SC-70-6
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-vpc39qpl/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.6)
  • ✓pads: 6 pins = 6 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 6 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ smun5114dw1t1g.kicad_sym✓ smun5114dw1t1g.kicad_mod✓ smun5114dw1t1g.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 7d ago
viewers smun5114dw1t1g: viewers · Ray 7d ago
package.json Publish 0.1.0 · Ray 7d ago
page.json Set visibility: public · Ray 7d ago
README.md Publish 0.1.0 · Ray 7d ago
smun5114dw1t1g-etched.glb Publish 0.1.0 · Ray 7d ago
smun5114dw1t1g-etched.step smun5114dw1t1g: factory component page (tier=mfr) · Ray 7d ago
smun5114dw1t1g-hero.glb smun5114dw1t1g: hero GLB from the etched model (keeps the MPN mark) · Ray 7d ago
smun5114dw1t1g-hero.overlay.json Publish 0.1.0 · Ray 7d ago
smun5114dw1t1g.glb Publish 0.1.0 · Ray 7d ago
smun5114dw1t1g.kicad_mod Publish 0.1.0 · Ray 7d ago
smun5114dw1t1g.kicad_sym Publish 0.1.0 · Ray 7d ago
smun5114dw1t1g.lbr Publish 0.1.0 · Ray 7d ago
smun5114dw1t1g.step Publish 0.1.0 · Ray 7d ago
verification.json Verified: Published by the parts factory: tier mfr, 6 pins · Ray 7d ago

SMUN5114DW1T1G

onsemi · Digital Transistors · SOT-363-6

SMUN5114DW1T1G from onsemi, in a SOT-363-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 E2 passive Emitter of transistor Q2 in the dual bias resistor transistor (BRT) network, with Q2's monolithic base resistor (R1 = 10 kΩ) and base-emitter resistor (R2 = 47 kΩ) integrated in the package.
2 B2 passive Base (input) of transistor Q2, connected to the internal series base resistor R1 of the bias network.
3 C1 passive Collector of transistor Q1 in the dual BRT network; common maximum ratings for Q1 and Q2 are VCEO 50 Vdc and IC 100 mAdc continuous.
4 E1 passive Emitter of transistor Q1 in the dual BRT network, with its internal bias resistors integrated in the package.
5 B1 passive Base (input) of transistor Q1, connected to the internal series base resistor R1 of the bias network.
6 C2 passive Collector of transistor Q2 in the dual BRT network; common maximum ratings for Q1 and Q2 are VCEO 50 Vdc and IC 100 mAdc continuous.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOT-363-6
Category Triode/MOS Tube/Transistor
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Collector−Base Cutoff Current ICBO 100 nAdc VCB = 50 V, IE = 0 3
Collector−Emitter Cutoff Current ICEO 500 nAdc VCE = 50 V, IB = 0 3
Emitter−Base Cutoff Current IEBO 0.2 mAdc VEB = 6.0 V, IC = 0 3
Collector−Base Breakdown Voltage V(BR)CBO 50 Vdc IC = 10 A, IE = 0 3
Collector−Emitter Breakdown Voltage V(BR)CEO 50 Vdc IC = 2.0 mA, IB = 0 3
DC Current Gain hFE 80 140 IC = 5.0 mA, VCE = 10 V 3
Collector−Emitter Saturation Voltage VCE(sat) 0.25 Vdc IC = 10 mA, IB = 0.3 mA 3
Input Resistor R1 7 10 13 k 3
Resistor Ratio R1/R2 0.17 0.21 0.25 3
Output Voltage (on) VOL 0.2 Vdc VCC = 5.0 V, VB = 2.5 V, RL = 1.0 k 3
Output Voltage (off) VOH 4.9 Vdc VCC = 5.0 V, VB = 0.5 V, RL = 1.0 k 3
Collector−Base Voltage VCBO 50 Vdc TA = 25°C, common for Q1 and Q2 1
Collector−Emitter Voltage VCEO 50 Vdc TA = 25°C, common for Q1 and Q2 1
Collector Current − Continuous IC 100 mAdc TA = 25°C, common for Q1 and Q2 1
Input Forward Voltage VIN(fwd) 40 Vdc TA = 25°C, common for Q1 and Q2 1
Input Reverse Voltage VIN(rev) 6 Vdc TA = 25°C, common for Q1 and Q2 1
Total Device Dissipation, one junction heated PD 187 mW TA = 25°C (Note 1, FR-4 @ Minimum Pad) 2
Total Device Dissipation, one junction heated PD 256 mW TA = 25°C (Note 2, FR-4 @ 1.0 x 1.0 Inch Pad) 2
Derate above 25°C, one junction heated 1.5 mW/°C Note 1, FR-4 @ Minimum Pad 2
Derate above 25°C, one junction heated 2 mW/°C Note 2, FR-4 @ 1.0 x 1.0 Inch Pad 2
Thermal Resistance, Junction to Ambient, one junction heated RJA 670 °C/W Note 1, FR-4 @ Minimum Pad 2
Thermal Resistance, Junction to Ambient, one junction heated RJA 490 °C/W Note 2, FR-4 @ 1.0 x 1.0 Inch Pad 2
Total Device Dissipation, both junctions heated PD 250 mW Both junctions heated (Note 3); TA = 25°C (Note 1) 2
Total Device Dissipation, both junctions heated PD 385 mW Both junctions heated (Note 3); TA = 25°C (Note 2) 2
Derate above 25°C, both junctions heated 2 mW/°C Both junctions heated (Note 3); Note 1 2
Derate above 25°C, both junctions heated 3 mW/°C Both junctions heated (Note 3); Note 2 2
Thermal Resistance, Junction to Ambient, both junctions heated RJA 493 °C/W Both junctions heated (Note 3); Note 1 2
Thermal Resistance, Junction to Ambient, both junctions heated RJA 325 °C/W Both junctions heated (Note 3); Note 2 2
Thermal Resistance, Junction to Lead, both junctions heated RJL 188 °C/W Both junctions heated (Note 3); Note 1 2
Thermal Resistance, Junction to Lead, both junctions heated RJL 208 °C/W Both junctions heated (Note 3); Note 2 2
Junction and Storage Temperature Range TJ, Tstg -55 150 °C 2
Resistor R2 nominal value (from title) R2 47 k 1

CAD (KiCad official)

  • Symbol: SMUN5114DW1T1G
  • Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
  • 3D model: SOT-363-6 (KiCad packages3D, STEP)
  • 3D model files: smun5114dw1t1g-etched.step / smun5114dw1t1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); smun5114dw1t1g.step / smun5114dw1t1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (11 pp, sha256 97d44ee0af9229e2, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF