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SM4620PRL

Public Made by Adom

by adom

SPS MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SM4620PRL

SPS · MOSFETs · SOP-8

SM4620PRL from SPS, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S2 passive Source of the N-channel MOSFET (channel 2), rated VDS 30 V and ID 6 A at TA=25°C.
2 G2 input Gate of the N-channel MOSFET (channel 2), with a maximum gate-source voltage of 20 V.
3 S1 passive Source of the P-channel MOSFET (channel 1), rated VDS -30 V and ID -5.3 A at TA=25°C.
4 G1 input Gate of the P-channel MOSFET (channel 1), with a maximum gate-source voltage of 20 V.
5 D1 passive Drain of the P-channel MOSFET (channel 1), tied internally to pins 5 and 6, rated VDS -30 V.
6 D1 passive Drain of the P-channel MOSFET (channel 1), tied internally to pins 5 and 6, rated VDS -30 V.
7 D2 passive Drain of the N-channel MOSFET (channel 2), tied internally to pins 7 and 8, rated VDS 30 V.
8 D2 passive Drain of the N-channel MOSFET (channel 2), tied internally to pins 7 and 8, rated VDS 30 V.

Key specifications

Parameter Value
Manufacturer SPS
Package SOP-8
Category Transistors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage (N-channel) VDS 30 V P-channel: -30 1
Gate-Source Voltage VGS 20 V ±V; N and P channel both 20 1
Continuous Drain Current ID 6 A TA=25°C; P-channel -5.3 1
Continuous Drain Current ID 5 A TA=70°C; P-channel -4.5 1
Pulsed Drain Current IDM 9.6 A P-channel -8.5 1
Avalanche Current IAR 1.92 A P-channel -1.7 1
Repetitive avalanche energy EAR 4.416 mJ L=0.1mH; P-channel -3.9 1
Power Dissipation PD 2 W TA=25°C; P-channel 2 1
Power Dissipation PD 1.3 W TA=70°C; P-channel 1.44 1
Junction and Storage Temperature Range TJ, TSTG -55 150 °C 1
Maximum Junction-to-Ambient RθJA 105 157 °C/W t ≤ 10s 1
Maximum Junction-to-Ambient RθJA 210 252 °C/W Steady State 1
Maximum Junction-to-Lead RθJL 63 100 °C/W Steady State 1
Drain-Source Breakdown Voltage BVDSS 30 V ID = -250uA, VGS = 0V 2
Zero Gate Voltage Drain Current IDSS 1 5 uA VDS=30V, VGS=0V 2
Gate-Body leakage current IGSS -100 100 nA VDS = 0V, VGS = ±20V 2
Gate Threshold Voltage VGS(th) 1.2 1.8 2.4 V VDS = VGS ID = 250µA 2
Static Drain-Source On-Resistance RDS(ON) 29.4 42 mΩ 2
Static Drain-Source On-Resistance RDS(ON) 46.2 60.1 mΩ VGS=4.5V, ID=6A 2
Diode Forward Voltage VSD 0.72 1 V IS=1A,VGS=18V 2
Maximum Body-Diode Continuous Current IS 6 A 2
Input Capacitance Ciss 255 311 pF VGS=0V, VDS=15V, f=1MHz 2
Output Capacitance Coss 45 55 pF VGS=0V, VDS=15V, f=1MHz 2
Reverse Transfer Capacitance Crss 35 41 pF VGS=0V, VDS=15V, f=1MHz 2
Forward Transconductance gFS 83 S VDS=5V, ID=6A 2
Gate resistance Rg 0.65 Ω VGS=0V, VDS=0V, f=1MHz 2
Total Gate Charge (10V) Qg 2.55 nC VGS=10V, VDS=15V, ID=6A 2
Body Diode Reverse Recovery Time trr 8.5 ns IF=-8A, dI/dt=500A/µs 2
Body Diode Reverse Recovery Charge Qrr 2.2 nC IF=18A, dI/dt=500A/µs 2

CAD (KiCad official)

  • Symbol: SM4620PRL
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: sm4620prl-etched.step / sm4620prl-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sm4620prl.step / sm4620prl.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SPS datasheet (4 pp, sha256 80b0a6a40f91f306, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF