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SM04B-GHS-TB(LF)(SN)

JST · GH series, 1.25 mm pitch, 4 circuits · side entry (right angle) SMT shrouded header with two solder tabs

SM04B-GHS-TB(LF)(SN) is the 4 circuit, side entry member of JST's GH wire-to-board family: the cable plugs in parallel to the board. It is a surface mount header with four tin plated phosphor bronze contacts on a 1.25 mm pitch and two brass solder tabs that hold it to the board. The (LF)(SN) suffix is JST's lead free, tin plated product label (JST eGH.pdf p.2). It mates with the GHR-04V-S housing fitted with SSHL-002T-P0.2 crimp contacts.

Key specifications

Circuits 4, pitch 1.25 mm
Entry Side entry (right angle), surface mount, 2 solder tabs
Current rating 1.0 A AC, DC (AWG #26)
Voltage rating 50 V AC, DC
Temperature range -25 to +85 C, including the temperature rise from current
Contact resistance 30 mOhm max initial, 50 mOhm max after environmental tests
Insulation resistance 100 MOhm min
Withstanding voltage 500 V AC for 1 minute
Applicable wire AWG #30 to #26, insulation O.D. 0.76 to 1.0 mm
Contacts Phosphor bronze, copper undercoated, tin plated (reflow treatment)
Housing PA9T, UL94V-0, natural (ivory)
Solder tabs Brass, copper undercoated, tin plated
Size 8.25 mm wide (B), 4.05 mm deep plus 0.8 mm tails, 4.25 mm tall; 4.35 mm tall mated
Packaging Embossed tape, 2,500 per reel
Standards UL Recognized E60389

Source: JST GH catalog eGH.pdf p.1 (Specifications, PC board layout and Assembly layout) and p.2 (Shrouded header, Material and Finish).

Specifications, eGH.pdf p.1

Circuit numbering and pin 1

Pin Name What it is
1 1 Circuit No.1: the left contact seen from the mating face with the board below
2 2 Circuit No.2
3 3 Circuit No.3
4 4 Circuit No.4: the right contact seen from the mating face
MP MP The two solder tabs, one at each end. Mechanical only, not a contact; both pads share the number MP

The pin numbers are contact positions. What each circuit carries is the design's choice; check the cable's wiring against the mating face before assembly.

JST marks circuit 1 only in its drawing (p.2, side entry view, looking into the mating face): it is at the left. On the footprint the mating face points toward +Y (down in KiCad's top view), so a person facing the opening has -X on the left, and pad 1 is the -X end (x = -1.875 mm). KiCad's F.Fab chevron and the silkscreen tick sit at the same end. Neither the real header nor the 3D model carries a pin-1 mark; the 3D hero adds a pin-1 dot beside pad 1 as reference art.

Shrouded header, side entry type, eGH.pdf p.2

Mating parts

Part Role Page
GHR-04V-S 4 circuit cable housing, PBT natural (white); A 3.75, B 6.25 mm adom/ghr-04v-s
SSHL-002T-P0.2 Crimp contact, AWG #30 to #26, insulation O.D. 0.76 to 1.0 mm, 35,000 per reel adom/sshl-002t-p0-2

JST notes that SSHL-003()-P0.2 contacts cannot be used in GH housings (p.1). Crimp tooling named by JST: machine AP-K2N, applicator MKS-L-10-3, dies MK/SSHL-002-02, applicator with dies APLMK SSHL002-02 (p.1). The top entry version of this header is BM04B-GHS-TBT (adom/bm04b-ghs-tbt); it uses a different land pattern.

Housing, eGH.pdf p.2

Contact, eGH.pdf p.1

Footprint

sm04b-ghs-tb-lf-sn.kicad_mod is KiCad's Connector_JST:JST_GH_SM04B-GHS-TB_1x04-1MP_P1.25mm_Horizontal with its pads untouched (only its name, Value and 3D model path changed). Every pad was checked against JST's recommended PC board layout for the side entry type (p.1, drawn from the component side):

Pad JST layout (x, y, w x h, mm) Footprint Match
1 -1.875, -1.85, 0.6 x 1.7 -1.875, -1.85, 0.6 x 1.7 yes
2 -0.625, -1.85, 0.6 x 1.7 -0.625, -1.85, 0.6 x 1.7 yes
3 0.625, -1.85, 0.6 x 1.7 0.625, -1.85, 0.6 x 1.7 yes
4 1.875, -1.85, 0.6 x 1.7 1.875, -1.85, 0.6 x 1.7 yes
MP -3.725, 1.35, 1.0 x 2.7 -3.725, 1.35, 1.0 x 2.7 yes
MP 3.725, 1.35, 1.0 x 2.7 3.725, 1.35, 1.0 x 2.7 yes

How the JST numbers become coordinates: signal pads 0.6 wide on 1.25 pitch and 5.4 - 3.7 = 1.7 long; tab pads 1.0 x 2.7, inner edge 1.35 from the outer contact centre (so the tab centre is 1.875 + 1.35 + 0.5 = 3.725); in Y the signal pads run 3.7 to 5.4 behind the tabs' front edge, putting the signal row 3.2 mm behind the tab centres. JST's header outline sits 0.25 behind the tabs' front edge, which is KiCad's F.Fab front edge (y 2.45). One difference: KiCad rounds the pad corners (roundrect ratio 0.25, 0.15 mm radius on the signal pads); JST draws plain rectangles. Full comparison: provenance/footprint-vs-jst.json, script provenance/tools/compare_footprint.py.

Side entry PC board layout, eGH.pdf p.1

Symbol

sm04b-ghs-tb-lf-sn.kicad_sym: reference J, contacts 1 to 4 on the left as passive pins, and one MP pin on the right for the two solder tabs, typed unconnected so ERC flags it if it is wired by accident. If a design wants the tabs on ground, change the pin type or connect them on the board. The symbol carries MPN, Manufacturer, Datasheet, Mouser, DigiKey, LCSC and Adom Wiki properties for the BOM; its Footprint property is KiCad's stock land pattern named above, which is pad-identical to this page's footprint.

Made with adom-symbol 1.2.6 (provenance/symbol-create.json) and then moved onto the 2.54 mm grid, because adom-symbol 1.2.6 places pins at y -2.00, -4.54 and so on, where wires do not land (provenance/tools/symbol_post.py).

Symbol

3D models

File What it is
sm04b-ghs-tb-lf-sn.step The library model for board CAD: KiCad's JST_GH_SM04B-GHS-TB model, bytes unchanged
sm04b-ghs-tb-lf-sn.glb The same model as GLB for boards and digital twins: housing and contacts nodes with ivory and tin materials, no reference artwork
sm04b-ghs-tb-lf-sn-hero.glb The annotated page hero (adom-hero 1.4): the model plus teal dashed pad outlines, silkscreen with a pin-1 dot and pad numbers. Display only, never for a board
lod/ Board-use detail levels (below)

Frame for every file: Z up, seated on z = 0, centred on the KiCad footprint origin, contact tails toward +Y and the mating face toward -Y, contact 1 on pad 1; binds with zero offset and rotation.

Where the model comes from, and how it was checked

JST publishes STEP files on jst-mfg.com, but on 2026-10-21 that site refused connections from the build host and jst.com answered 403, so JST's STEP was not obtained. The page uses KiCad's library model (kicad-packages3D, Frank Severinsen 2018, CC-BY-SA-4.0) and checks it against JST's drawing:

Dimension (mm) JST KiCad model Match
B overall width incl. tabs 8.25 (p.2) 8.250 yes
A outer contact span 3.75 (p.2) 3.750 yes
Contact pitch 1.25 1.250 yes
Contact tail width 0.2 (p.2) 0.200 yes
Housing depth, mating face to rear 4.05 (p.2) 4.050 yes
Contact tail beyond housing rear 0.8 (p.2) 0.895 no, 0.095 longer
Height above board 4.25 (p.2) 4.250 yes
Tab inner face to circuit 4 centre 1.75 (p.2) 1.750 yes
Tab centre 3.725 (p.1 layout) 3.725 yes
Housing front vs header outline footprint y 2.45 (p.1) 2.47 within 0.02

The longer tails do not matter for the board: their tips still end 0.225 mm inside the 1.7 mm signal pads. The housing is a simplified envelope (latch window and ribs as boxes) and carries no marking, like the real part. Measured from the STEP's bounding box and the per-part bounds of the converted GLB; the full record is provenance/3d-model.json.

Model, view onto the mating face: circuit 1 at the left

Model from above: contact tails toward the top, as on the footprint

Detail levels for board and digital-twin viewers

Level File Triangles Draw calls Size
high sm04b-ghs-tb-lf-sn-high.glb 756 2 33 KiB
medium sm04b-ghs-tb-lf-sn-medium.glb 756 2 24 KiB
low sm04b-ghs-tb-lf-sn-low.glb 744 2 24 KiB
super-low sm04b-ghs-tb-lf-sn-super-low.glb 722 2 24 KiB

All four share the frame of the library model, carry no footprint or silkscreen artwork and keep the contacts and tabs. KiCad's model is already low-poly (all planar faces), so the lower levels save bytes mainly through quantization. Status: candidate; the cached previews were inspected, a streaming LOD viewer has not qualified them.

CAD downloads

Tool Files
KiCad sm04b-ghs-tb-lf-sn.kicad_sym, sm04b-ghs-tb-lf-sn.kicad_mod, sm04b-ghs-tb-lf-sn.step
Fusion / EAGLE sm04b-ghs-tb-lf-sn.lbr (adom-lbr 2.47.5; attributes MPN, MANUFACTURER, DATASHEET, ADOM_WIKI, MOUSER_PN, DIGIKEY_PN, LCSC_PN; the tabs are pads MP and MP@2 joined to pin MP, direction nc)
Altium altium/SM04B-GHS-TB-LF-SN.SchLib, altium/SM04B-GHS-TB-LF-SN.PcbLib (3D body embedded), hub altium/sm04b-ghs-tb-lf-sn.adom-lbr.json. MP is a Passive pin in Altium, which has no unconnected pin type
Web sm04b-ghs-tb-lf-sn.glb, lod/

The .lbr and the Altium files pass adom-lbr lint, and reading the Altium pair back gives the same five pins and six pads. They have not yet been opened in Fusion or Altium.

Sourcing (checked 2026-10-21)

Distributor Part number Stock Note
Mouser 306-SM04BGHSTBLFSN 762 Exact MPN; 0.39 USD each, 0.281 USD at 100
DigiKey 455-1566-2-ND 0 Listed as SM04B-GHS-TB (JST Sales America), tape and reel, status Active; product image labelled SM04B-GHS-TB(LF)(SN)
LCSC / JLCPCB C189895 5,852 Exact MPN, extended part

LCSC also lists C51940118, sold as XY-SM04B-GHS-TB by another maker; it is not this JST part.

Manufacturer and resources

Resource Link
GH series catalog (datasheet) eGH.pdf on jst-mfg.com; copy on this page: docs/sm04b-ghs-tb-lf-sn-datasheet.pdf
Manufacturer J.S.T. Mfg. Co., Ltd. (jst-mfg.com); in the Americas JST Sales America (jst.com)
KiCad footprint Connector_JST.pretty/JST_GH_SM04B-GHS-TB_1x04-1MP_P1.25mm_Horizontal.kicad_mod
KiCad 3D model Connector_JST.3dshapes/JST_GH_SM04B-GHS-TB_1x04-1MP_P1.25mm_Horizontal.step

The page's PDF was taken from the datasheet link on the LCSC/JLCPCB part record because jst-mfg.com was unreachable from the build host; it is JST's eGH catalog (2 pages, no revision printed, PDF created 2016-11-18, sha256 fe239aeccf170880). Compare it with JST's current copy before relying on a later revision.

Cited pages:

eGH.pdf p.1 eGH.pdf p.2

Provenance

  • provenance/sources.json: datasheet (hash, source, cited pages), footprint upstream and the three edits, symbol tool and post-edit, .lbr and Altium tools, distributor lookup.
  • provenance/3d-model.json: the 3D source, the attempts to reach JST's STEP, every dimension against JST, pin-1 evidence, conversion steps and hashes.
  • provenance/footprint-vs-jst.json: the pad-by-pad comparison.
  • verification.json: what was checked, by whom, with file hashes; open items are listed as open.
  • Tools: provenance/tools/ (GLB parts and materials, footprint comparison, symbol post-edit, manifests, renderer).

What is not verified yet

  • JST's own STEP has not been compared with the KiCad model.
  • The symbol, footprint and 3D model have not been opened in KiCad, Fusion or Altium on a desktop; the files pass the tools' parsers and lint.
  • No physical fit, mating, crimp or reflow qualification.

License

Adom-authored files (symbol, README, manifests, provenance, renders, viewers) are CC-BY-4.0 (LICENSE). The footprint and the 3D model come from the KiCad libraries under CC-BY-SA-4.0 with the KiCad library exception (LICENSE-KICAD.md). The datasheet and its figures are JST's document, included for reference (THIRD_PARTY.md).

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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