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SLP240C03D

Public Made by Adom

by adom

Slkor SLKORMICRO Elec MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SLP240C03D

Slkor SLKORMICRO Elec · MOSFETs · SOP-8

SLP240C03D from Slkor SLKORMICRO Elec, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S2 passive Source of the N-channel MOSFET (channel 2, VDS 30V, ID 8.5A).
2 G2 input Gate of the N-channel MOSFET, VGS maximum ±20V.
3 S1 passive Source of the P-channel MOSFET (channel 1, VDS -30V, ID -7.0A).
4 G1 input Gate of the P-channel MOSFET, VGS maximum ±20V.
5 D1 passive Drain of the P-channel MOSFET, tied internally with pin 6 (VDS -30V).
6 D1 passive Drain of the P-channel MOSFET, tied internally with pin 5 (VDS -30V).
7 D2 passive Drain of the N-channel MOSFET, tied internally with pin 8 (VDS 30V).
8 D2 passive Drain of the N-channel MOSFET, tied internally with pin 7 (VDS 30V).

Key specifications

Parameter Value
Manufacturer Slkor SLKORMICRO Elec
Package SOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage (N-Channel) VDS 30 V 1
Drain-Source Voltage (P-Channel) VDS -30 V 1
Gate-Source Voltage (N-Channel) VGS -20 20 V 1
Gate-Source Voltage (P-Channel) VGS -20 20 V 1
Continuous Drain Current (N-Channel) ID 8.5 A TA=25℃ 1
Continuous Drain Current (P-Channel) ID -7 A TA=25℃ 1
Pulsed Drain Current (N-Channel) IDM 34 A Note 1: repetitive rating, pulse width limited by maximum junction temperature 1
Pulsed Drain Current (P-Channel) IDM -26 A Note 1: repetitive rating, pulse width limited by maximum junction temperature 1
Maximum Power Dissipation (N-Channel and P-Channel, printed as 2.0 W each) PD 2 W TA=25℃ 1
Operating Junction and Storage Temperature Range TJ,TSTG -55 150 ℃ 1
Drain-Source Breakdown Voltage (N-Channel) BVDSS 30 V VGS=0V ID=250μA 2
Zero Gate Voltage Drain Current (N-Channel) IDSS 50 μA VDS=24V,VGS=0V 2
Gate-Body Leakage Current (N-Channel) IGSS -100 100 nA VGS=±20V,VDS=0V 2
Gate Threshold Voltage (N-Channel) VGS(th) 1.2 1.6 2.4 V VDS=VGS,ID=250μA 2
Drain-Source On-State Resistance (N-Channel) RDS(ON) 19 21 mΩ VGS=10V, ID=8.5A 2
Drain-Source On-State Resistance (N-Channel) RDS(ON) 29 32 mΩ VGS=4.5V, ID=5A 2
Forward Transconductance (N-Channel) gFS 5 S VDS=5V,ID=5.0A 2
Diode Forward Voltage (N-Channel) VSD 0.75 1 V VGS=0V,IS=2A 2
Drain-Source Breakdown Voltage (P-Channel) BVDSS -30 V VGS=0V ID=-250μA 5
Zero Gate Voltage Drain Current (P-Channel) IDSS -50 μA VDS=-24V,VGS=0V 5
Gate-Body Leakage Current (P-Channel) IGSS -100 100 nA VGS=±20V,VDS=0V 5
Gate Threshold Voltage (P-Channel) VGS(th) -1 -1.3 -2 V VDS=VGS,ID=-250μA 5
Drain-Source On-State Resistance (P-Channel) RDS(ON) 42 45 mΩ VGS=-10V, ID=-7.0A 5
Drain-Source On-State Resistance (P-Channel) RDS(ON) 55 60 mΩ VGS=-4.5V, ID=-5.0A 5
Forward Transconductance (P-Channel) gFS 10 S VDS=-5V,ID=-5.0A 5
Diode Forward Voltage (P-Channel) VSD 0.75 -1 V VGS=0V,IS=-2.0A 5
Thermal Resistance, Junction-to-Ambient (N-Channel) RθJA 63.5 ℃/W Surface mounted on FR4 board, t ≤ 10 sec (Note 2) 1
Thermal Resistance, Junction-to-Ambient (P-Channel) RθJA 63.5 ℃/W Surface mounted on FR4 board, t ≤ 10 sec (Note 2) 1

CAD (KiCad official)

  • Symbol: SLP240C03D
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: slp240c03d-etched.step / slp240c03d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); slp240c03d.step / slp240c03d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Slkor SLKORMICRO Elec datasheet (8 pp, sha256 ab4af1e28ca2a39c, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF