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SI8640BC-B-IS1
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Skyworks Solutions Digital Isolators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SI8640BC-B-IS1
Skyworks Solutions · Digital Isolators · SOIC-16
SI8640BC-B-IS1 from Skyworks Solutions, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Side 1 power supply, operating over 2.5 V to 5.5 V and requiring a 0.1 µF bypass capacitor to GND1 placed as close as possible to the package. |
| 2 | GND1 | power_in | Side 1 ground; on narrow-body devices this pin must be externally connected to the respective ground. |
| 3 | A1 | input | Side 1 digital input. |
| 4 | A2 | input | Side 1 digital input. |
| 5 | A3 | bidirectional | Side 1 digital input or output. |
| 6 | A4 | bidirectional | Side 1 digital input or output. |
| 7 | NC | unconnected | No connect on Si8640; not internally connected and can be left floating, tied to VDD, or tied to GND. |
| 8 | GND1 | power_in | Side 1 ground; on narrow-body devices this pin must be externally connected to the respective ground. |
| 9 | GND2 | power_in | Side 2 ground; on narrow-body devices this pin must be connected to external ground. |
| 10 | EN2 | input | Side 2 active high enable; when disabled (EN = 0) the output pins are driven into a high-impedance state. |
| 11 | B4 | bidirectional | Side 2 digital input or output. |
| 12 | B3 | bidirectional | Side 2 digital input or output. |
| 13 | B2 | output | Side 2 digital output. |
| 14 | B1 | output | Side 2 digital output. |
| 15 | GND2 | power_in | Side 2 ground; on narrow-body devices this pin must be connected to external ground. |
| 16 | VDD2 | power_in | Side 2 power supply, operating over 2.5 V to 5.5 V and requiring a 0.1 µF bypass capacitor to GND2. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Skyworks Solutions |
| Package | SOIC-16 |
| Category | Signal Isolation Devices |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD1, VDD2 | 2.375 | 5.5 | V | Recommended operating | 12 | |
| Ambient Operating Temperature | TA | -40 | 25 | 125 | °C | Recommended operating | 12 |
| Junction Operating Temperature | TJ | 150 | °C | Recommended operating | 12 | ||
| Supply Voltage | VDD1, VDD2 | -0.5 | 7 | V | Absolute maximum | 28 | |
| Input Voltage | VI | -0.5 | V | Max VDD + 0.5 | 28 | ||
| Output Voltage | VO | -0.5 | V | Max VDD + 0.5 | 28 | ||
| Output Current Drive Channel | IO | 10 | mA | Absolute maximum | 28 | ||
| Storage Temperature | TSTG | -65 | 150 | °C | Absolute maximum | 28 | |
| Junction Temperature | TJ | 150 | °C | Absolute maximum | 28 | ||
| Lead Solder Temperature | 260 | °C | 10 s | 28 | |||
| VDD Undervoltage Threshold rising | VDDUV+ | 1.95 | 2.24 | 2.375 | V | VDD1, VDD2 rising | 12 |
| VDD Undervoltage Threshold falling | VDDUV- | 1.88 | 2.16 | 2.325 | V | VDD1, VDD2 falling | 12 |
| VDD Undervoltage Hysteresis | VDDHYS | 50 | 70 | 95 | mV | 12 | |
| Positive-Going Input Threshold | VT+ | 1.4 | 1.67 | 1.9 | V | All inputs rising | 12 |
| Negative-Going Input Threshold | VT- | 1 | 1.23 | 1.4 | V | All inputs falling | 12 |
| Input Hysteresis | VHYS | 0.38 | 0.44 | 0.5 | V | 12 | |
| High Level Input Voltage | VIH | 2 | V | 12 | |||
| Low Level Input Voltage | VIL | 0.8 | V | 12 | |||
| High Level Output Voltage | VOH | 4.8 | V | loh = -4 mA; min VDD1, VDD2, 0.4 | 12 | ||
| Low Level Output Voltage | VOL | 0.2 | 0.4 | V | lol = 4 mA | 12 | |
| Input Leakage Current | IL | -10 | 10 | µA | Si864xxA/B/C/D | 12 | |
| Output Impedance | ZO | 50 | Ω | 12 | |||
| DC Supply Current VDD1 | IDD1 | 1 | 1.6 | mA | Si8640Bx, Ex; VI = 0(Bx), 1(Ex) | 13 | |
| DC Supply Current VDD2 | IDD2 | 2.4 | 3.8 | mA | Si8640Bx, Ex; VI = 0(Bx), 1(Ex) | 13 | |
| DC Supply Current VDD1 | IDD1 | 6.1 | 9.2 | mA | Si8640Bx, Ex; VI = 1(Bx), 0(Ex) | 13 | |
| DC Supply Current VDD2 | IDD2 | 2.5 | 4 | mA | Si8640Bx, Ex; VI = 1(Bx), 0(Ex) | 13 | |
| 1 Mbps Supply Current VDD1 | IDD1 | 3.6 | 5 | mA | Si8640Bx, Ex; all inputs 500 kHz square wave, CI = 15 pF | 13 | |
| 1 Mbps Supply Current VDD2 | IDD2 | 2.9 | 4 | mA | Si8640Bx, Ex; all inputs 500 kHz square wave, CI = 15 pF | 13 | |
| 10 Mbps Supply Current VDD1 | IDD1 | 3.6 | 5 | mA | Si8640xA/B/C/D; all inputs 5 MHz square wave, CI = 15 pF | 13 | |
| 10 Mbps Supply Current VDD2 | IDD2 | 4 | 5.6 | mA | Si8640xA/B/C/D; all inputs 5 MHz square wave, CI = 15 pF | 13 | |
| 100 Mbps Supply Current VDD1 | IDD1 | 3.6 | 5 | mA | Si8640xA/B/C/D; all inputs 50 MHz square wave, CI = 15 pF | 14 | |
| 100 Mbps Supply Current VDD2 | IDD2 | 17.5 | 22.8 | mA | Si8640xA/B/C/D; all inputs 50 MHz square wave, CI = 15 pF | 14 | |
| Maximum Data Rate | 0 | 150 | Mbps | Si864xBx, Ex | 14 | ||
| Minimum Pulse Width | 5 | ns | Si864xBx, Ex | 14 | |||
| Propagation Delay | tPHL, tPLH | 5 | 8 | 13 | ns | See Figure 4.2 | 14 |
| Pulse Width Distortion | PWD | 0.2 | 4.5 | ns | /tPLH, tPHL/; see Figure 4.2 | 14 | |
| Propagation Delay Skew | tPSK(P-P) | 2 | 4.5 | ns | 14 | ||
| Channel-Channel Skew | tPSK | 0.4 | 2.5 | ns | 14 | ||
| Output Rise Time | tr | 2.5 | 4 | ns | CL = 15 pF | 14 | |
| Output Fall Time | tf | 2.5 | 4 | ns | CL = 15 pF | 15 | |
| Peak Eye Diagram Jitter | tJIT(PK) | 350 | ps | See Figure 2.3 | 15 | ||
| Enable to Data Valid | ten1 | 6 | 11 | ns | See Figure 4.1 | 15 | |
| Enable to Data Tri-State | ten2 | 8 | 12 | ns | See Figure 4.1 | 15 | |
| Input power loss to valid default output | tSD | 8 | 12 | ns | See Figure 3.1 | 15 | |
| Start-up Time | tSU | 15 | 40 | µs | 15 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. | 35 |
CAD (KiCad official)
- Symbol:
SI8640BC-B-IS1 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
si8640bc-b-is1-etched.step/si8640bc-b-is1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si8640bc-b-is1.step/si8640bc-b-is1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Skyworks Solutions datasheet (46 pp, sha256
032aeb8b1ade5e14, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SI8640BC-B-IS1
**Skyworks Solutions** · Digital Isolators · SOIC-16
SI8640BC-B-IS1 from Skyworks Solutions, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Side 1 power supply, operating over 2.5 V to 5.5 V and requiring a 0.1 µF bypass capacitor to GND1 placed as close as possible to the package. |
| 2 | GND1 | power_in | Side 1 ground; on narrow-body devices this pin must be externally connected to the respective ground. |
| 3 | A1 | input | Side 1 digital input. |
| 4 | A2 | input | Side 1 digital input. |
| 5 | A3 | bidirectional | Side 1 digital input or output. |
| 6 | A4 | bidirectional | Side 1 digital input or output. |
| 7 | NC | unconnected | No connect on Si8640; not internally connected and can be left floating, tied to VDD, or tied to GND. |
| 8 | GND1 | power_in | Side 1 ground; on narrow-body devices this pin must be externally connected to the respective ground. |
| 9 | GND2 | power_in | Side 2 ground; on narrow-body devices this pin must be connected to external ground. |
| 10 | EN2 | input | Side 2 active high enable; when disabled (EN = 0) the output pins are driven into a high-impedance state. |
| 11 | B4 | bidirectional | Side 2 digital input or output. |
| 12 | B3 | bidirectional | Side 2 digital input or output. |
| 13 | B2 | output | Side 2 digital output. |
| 14 | B1 | output | Side 2 digital output. |
| 15 | GND2 | power_in | Side 2 ground; on narrow-body devices this pin must be connected to external ground. |
| 16 | VDD2 | power_in | Side 2 power supply, operating over 2.5 V to 5.5 V and requiring a 0.1 µF bypass capacitor to GND2. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Skyworks Solutions |
| Package | SOIC-16 |
| Category | Signal Isolation Devices |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD1, VDD2 | 2.375 | | 5.5 | V | Recommended operating | 12 |
| Ambient Operating Temperature | TA | -40 | 25 | 125 | °C | Recommended operating | 12 |
| Junction Operating Temperature | TJ | | | 150 | °C | Recommended operating | 12 |
| Supply Voltage | VDD1, VDD2 | -0.5 | | 7 | V | Absolute maximum | 28 |
| Input Voltage | VI | -0.5 | | | V | Max VDD + 0.5 | 28 |
| Output Voltage | VO | -0.5 | | | V | Max VDD + 0.5 | 28 |
| Output Current Drive Channel | IO | | | 10 | mA | Absolute maximum | 28 |
| Storage Temperature | TSTG | -65 | | 150 | °C | Absolute maximum | 28 |
| Junction Temperature | TJ | | | 150 | °C | Absolute maximum | 28 |
| Lead Solder Temperature | | | | 260 | °C | 10 s | 28 |
| VDD Undervoltage Threshold rising | VDDUV+ | 1.95 | 2.24 | 2.375 | V | VDD1, VDD2 rising | 12 |
| VDD Undervoltage Threshold falling | VDDUV- | 1.88 | 2.16 | 2.325 | V | VDD1, VDD2 falling | 12 |
| VDD Undervoltage Hysteresis | VDDHYS | 50 | 70 | 95 | mV | | 12 |
| Positive-Going Input Threshold | VT+ | 1.4 | 1.67 | 1.9 | V | All inputs rising | 12 |
| Negative-Going Input Threshold | VT- | 1 | 1.23 | 1.4 | V | All inputs falling | 12 |
| Input Hysteresis | VHYS | 0.38 | 0.44 | 0.5 | V | | 12 |
| High Level Input Voltage | VIH | 2 | | | V | | 12 |
| Low Level Input Voltage | VIL | | | 0.8 | V | | 12 |
| High Level Output Voltage | VOH | | 4.8 | | V | loh = -4 mA; min VDD1, VDD2, 0.4 | 12 |
| Low Level Output Voltage | VOL | | 0.2 | 0.4 | V | lol = 4 mA | 12 |
| Input Leakage Current | IL | -10 | | 10 | µA | Si864xxA/B/C/D | 12 |
| Output Impedance | ZO | | 50 | | Ω | | 12 |
| DC Supply Current VDD1 | IDD1 | | 1 | 1.6 | mA | Si8640Bx, Ex; VI = 0(Bx), 1(Ex) | 13 |
| DC Supply Current VDD2 | IDD2 | | 2.4 | 3.8 | mA | Si8640Bx, Ex; VI = 0(Bx), 1(Ex) | 13 |
| DC Supply Current VDD1 | IDD1 | | 6.1 | 9.2 | mA | Si8640Bx, Ex; VI = 1(Bx), 0(Ex) | 13 |
| DC Supply Current VDD2 | IDD2 | | 2.5 | 4 | mA | Si8640Bx, Ex; VI = 1(Bx), 0(Ex) | 13 |
| 1 Mbps Supply Current VDD1 | IDD1 | | 3.6 | 5 | mA | Si8640Bx, Ex; all inputs 500 kHz square wave, CI = 15 pF | 13 |
| 1 Mbps Supply Current VDD2 | IDD2 | | 2.9 | 4 | mA | Si8640Bx, Ex; all inputs 500 kHz square wave, CI = 15 pF | 13 |
| 10 Mbps Supply Current VDD1 | IDD1 | | 3.6 | 5 | mA | Si8640xA/B/C/D; all inputs 5 MHz square wave, CI = 15 pF | 13 |
| 10 Mbps Supply Current VDD2 | IDD2 | | 4 | 5.6 | mA | Si8640xA/B/C/D; all inputs 5 MHz square wave, CI = 15 pF | 13 |
| 100 Mbps Supply Current VDD1 | IDD1 | | 3.6 | 5 | mA | Si8640xA/B/C/D; all inputs 50 MHz square wave, CI = 15 pF | 14 |
| 100 Mbps Supply Current VDD2 | IDD2 | | 17.5 | 22.8 | mA | Si8640xA/B/C/D; all inputs 50 MHz square wave, CI = 15 pF | 14 |
| Maximum Data Rate | | 0 | | 150 | Mbps | Si864xBx, Ex | 14 |
| Minimum Pulse Width | | | | 5 | ns | Si864xBx, Ex | 14 |
| Propagation Delay | tPHL, tPLH | 5 | 8 | 13 | ns | See Figure 4.2 | 14 |
| Pulse Width Distortion | PWD | | 0.2 | 4.5 | ns | /tPLH, tPHL/; see Figure 4.2 | 14 |
| Propagation Delay Skew | tPSK(P-P) | | 2 | 4.5 | ns | | 14 |
| Channel-Channel Skew | tPSK | | 0.4 | 2.5 | ns | | 14 |
| Output Rise Time | tr | | 2.5 | 4 | ns | CL = 15 pF | 14 |
| Output Fall Time | tf | | 2.5 | 4 | ns | CL = 15 pF | 15 |
| Peak Eye Diagram Jitter | tJIT(PK) | | 350 | | ps | See Figure 2.3 | 15 |
| Enable to Data Valid | ten1 | | 6 | 11 | ns | See Figure 4.1 | 15 |
| Enable to Data Tri-State | ten2 | | 8 | 12 | ns | See Figure 4.1 | 15 |
| Input power loss to valid default output | tSD | | 8 | 12 | ns | See Figure 3.1 | 15 |
| Start-up Time | tSU | | 15 | 40 | µs | | 15 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | | 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. | 35 |
## CAD (KiCad official)
- Symbol: `SI8640BC-B-IS1`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files: `si8640bc-b-is1-etched.step` / `si8640bc-b-is1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `si8640bc-b-is1.step` / `si8640bc-b-is1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Skyworks Solutions datasheet](docs/si8640bc-b-is1-datasheet.pdf) (46 pp, sha256 `032aeb8b1ade5e14`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/si8640bc-b-is1-datasheet.pdf)