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SI4435DYTRPBF

Infineon Technologies · MOSFETs · SO-8

SI4435DYTRPBF from Infineon Technologies, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	S	passive	Source terminal of the P-channel HEXFET; the absolute maximum drain-to-source voltage is -30 V.
2	S	passive	Source terminal of the P-channel HEXFET; the absolute maximum drain-to-source voltage is -30 V.
3	S	passive	Source terminal of the P-channel HEXFET; the absolute maximum drain-to-source voltage is -30 V.
4	G	input	Gate terminal; the absolute maximum gate-to-source voltage is ±20 V.
5	D	passive	Drain terminal; continuous drain current is -8.0 A at TA = 25°C and -6.4 A at TA = 70°C, with pulsed drain current of -50 A.
6	D	passive	Drain terminal; continuous drain current is -8.0 A at TA = 25°C and -6.4 A at TA = 70°C, with pulsed drain current of -50 A.
7	D	passive	Drain terminal; continuous drain current is -8.0 A at TA = 25°C and -6.4 A at TA = 70°C, with pulsed drain current of -50 A.
8	D	passive	Drain terminal; continuous drain current is -8.0 A at TA = 25°C and -6.4 A at TA = 70°C, with pulsed drain current of -50 A.

Key specifications

Parameter	Value
Manufacturer	Infineon Technologies
Package	SO-8
Category	Transistors/Thyristors
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Drain-Source Voltage	VDS			-30	V		1
Continuous Drain Current, VGS @ -10V, TA = 25°C	ID			-8	A	VGS @ -10V, TA = 25°C	1
Continuous Drain Current, VGS @ -10V, TA = 70°C	ID			-6.4	A	VGS @ -10V, TA = 70°C	1
Pulsed Drain Current	IDM			-50	A		1
Power Dissipation, TA = 25°C	PD			2.5	W	TA = 25°C	1
Power Dissipation, TA = 70°C	PD			1.6	W	TA = 70°C	1
Linear Derating Factor				0.02	W/°C		1
Gate-to-Source Voltage	VGS	-20		20	V		1
Junction and Storage Temperature Range	TJ, TSTG	-55		150	°C		1
Maximum Junction-to-Ambient Thermal Resistance	RθJA			50	°C/W		1
Continuous Source Current (Body Diode)	VSD			-1.2	V		2
Diode Forward Voltage	VSD			-1.2	V	TJ = 25°C, IS = -2.5A, VGS = 0V	2
Reverse Recovery Time	trr		34	51	ns	TJ = 25°C, IF = -2.5A	2
Reverse Recovery Charge	Qrr		33	50	nC	di/dt = -100A/µs	2
Drain-to-Source Breakdown Voltage	V(BR)DSS	-30			V	VGS = 0V, ID = -250µA	2
Static Drain-to-Source On-Resistance	RDS(on)		0.015	0.02	Ω	VGS = -10V, ID = -8.0A	2
Static Drain-to-Source On-Resistance	RDS(on)		0.026	0.035	Ω	VGS = -4.5V, ID = -5.0A	2
Gate Threshold Voltage	VGS(th)	-1			V	VDS = VGS, ID = -250µA	2
Drain-to-Source Leakage Current	IDSS			-10		VDS = -24V, VGS = 0V	2
Drain-to-Source Leakage Current, TJ = 70°C	IDSS			-10		VDS = -15V, VGS = 0V, TJ = 70°C	2
Gate-to-Source Forward Leakage	IGSS			-100		VGS = -20V	2
Gate-to-Source Reverse Leakage	IGSS			100		VGS = 20V	2
Total Gate Charge	Qg		40	60	nC	ID = -4.6A	2
Turn-On Delay Time	td(on)		16	24	ns	VDD = -15V, VGS = -10V	2
Rise Time	tr		76	110	ns	ID = -1.0A	2
Turn-Off Delay Time	td(off)		130	200	ns	RG = 6.0Ω	2
Fall Time	tf		90	140	ns	RD = 15Ω	2

CAD (KiCad official)

Symbol: SI4435DYTRPBF
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SO-8 (KiCad packages3D, STEP)
3D model files: si4435dytrpbf-etched.step / si4435dytrpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si4435dytrpbf.step / si4435dytrpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Infineon Technologies datasheet (8 pp, sha256 14c9f52e382d8fd8, retrieved 2026-10-19, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF