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SI3590DV-T1-GE3

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Vishay Intertech MOSFETs, TSOP-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SI3590DV-T1-GE3

Vishay Intertech · MOSFETs · TSOP-6

SI3590DV-T1-GE3 from Vishay Intertech, in a TSOP-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G1 input Gate of the N-channel MOSFET (Q1), with VGS limited to ±12 V.
2 S2 passive Source of the P-channel MOSFET (Q2), rated for VDS of -30 V.
3 G2 input Gate of the P-channel MOSFET (Q2), with VGS limited to ±12 V.
4 D2 passive Drain of the P-channel MOSFET (Q2), rated for VDS of -30 V and ID of -2 A (10 s).
5 S1 passive Source of the N-channel MOSFET (Q1), rated for VDS of 30 V.
6 D1 passive Drain of the N-channel MOSFET (Q1), rated for VDS of 30 V and ID of 3 A (10 s).

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package TSOP-6
Category Transistors/Thyristors
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source voltage (N-Ch) VDS 30 V 1
Drain-source voltage (P-Ch) VDS -30 V 1
Gate-source voltage (N-Ch) VGS -12 12 V 1
Gate-source voltage (P-Ch) VGS -12 12 V 1
Continuous drain current (N-Ch) ID 3 A TA = 25 °C, 10 s 1
Continuous drain current (N-Ch) ID 2.5 A TA = 25 °C, steady state 1
Continuous drain current (N-Ch) ID 2.3 A TA = 70 °C, 10 s 1
Continuous drain current (N-Ch) ID 2 A TA = 70 °C, steady state 1
Continuous drain current (P-Ch) ID -2 A TA = 25 °C, 10 s 1
Continuous drain current (P-Ch) ID -1.7 A TA = 25 °C, steady state 1
Continuous drain current (P-Ch) ID -1.6 A TA = 70 °C, 10 s 1
Continuous drain current (P-Ch) ID -1.3 A TA = 70 °C, steady state 1
Pulsed drain current (N-Ch) IDM 8 A 1
Pulsed drain current (P-Ch) IDM -8 A 1
Continuous source current (diode conduction) (N-Ch) IS 1.05 A 10 s 1
Continuous source current (diode conduction) (N-Ch) IS 0.75 A steady state 1
Continuous source current (diode conduction) (P-Ch) IS -1.05 A 10 s 1
Continuous source current (diode conduction) (P-Ch) IS -0.75 A steady state 1
Maximum power dissipation (N-Ch) PD 1.15 W TA = 25 °C, 10 s 1
Maximum power dissipation (N-Ch) PD 0.83 W TA = 25 °C, steady state 1
Maximum power dissipation (P-Ch) PD 1.15 W TA = 25 °C, 10 s 1
Maximum power dissipation (P-Ch) PD 0.83 W TA = 25 °C, steady state 1
Maximum power dissipation (N-Ch) PD 0.7 W TA = 70 °C, 10 s 1
Maximum power dissipation (N-Ch) PD 0.53 W TA = 70 °C, steady state 1
Maximum power dissipation (P-Ch) PD 0.7 W TA = 70 °C, 10 s 1
Maximum power dissipation (P-Ch) PD 0.53 W TA = 70 °C, steady state 1
Operating junction and storage temperature range TJ, Tstg -55 150 °C 1
Maximum junction-to-ambient (N-Ch) RthJA 93 110 °C/W t ≤ 10 s 1
Maximum junction-to-ambient (N-Ch) RthJA 130 150 °C/W steady state 1
Maximum junction-to-ambient (P-Ch) RthJA 93 110 °C/W t ≤ 10 s 1
Maximum junction-to-ambient (P-Ch) RthJA 130 150 °C/W steady state 1
Maximum junction-to-foot (drain) (N-Ch) RthJF 75 90 °C/W steady state 1
Maximum junction-to-foot (drain) (P-Ch) RthJF 75 90 °C/W steady state 1
Gate threshold voltage (N-Ch) VGS(th) 0.6 1.5 V VDS = VGS, ID = 250 μA 2
Gate threshold voltage (P-Ch) VGS(th) -0.6 -1.5 V VDS = VGS, ID = -250 μA 2
Gate-body leakage (N-Ch) IGSS -100 100 nA VDS = 0 V, VGS = ± 12 V 2
Gate-body leakage (P-Ch) IGSS -100 100 nA VDS = 0 V, VGS = ± 12 V 2
Zero gate voltage drain current (N-Ch) IDSS 1 μA VDS = 30 V, VGS = 0 V 2
Zero gate voltage drain current (P-Ch) IDSS -1 μA VDS = -30 V, VGS = 0 V 2
On-state drain current (N-Ch) ID(on) 5 A VDS ≥ 5 V, VGS = 4.5 V 2
On-state drain current (P-Ch) ID(on) -5 A VDS ≤ -5 V, VGS = -4.5 V 2
Drain-source on-state resistance (N-Ch) RDS(on) 0.062 0.077 Ω VGS = 4.5 V, ID = 3 A 2
Drain-source on-state resistance (P-Ch) RDS(on) 0.135 0.17 Ω VGS = -4.5 V, ID = -2 A 2
Drain-source on-state resistance (N-Ch) RDS(on) 0.095 0.12 Ω VGS = 2.5 V, ID = 2 A 2
Drain-source on-state resistance (P-Ch) RDS(on) 0.235 0.3 Ω VGS = -2.5 V, ID = -1.2 A 2
Diode forward voltage (N-Ch) VSD 0.8 1.1 V IS = 1.05 A, VGS = 0 V 2
Diode forward voltage (P-Ch) VSD -0.83 -1.1 V IS = -1.05 A, VGS = 0 V 2
Total gate charge (N-Ch) Qg 3 4.5 nC VDS = 15 V, VGS = 4.5 V, ID = 2 A 2
Total gate charge (P-Ch) Qg 3.8 6 nC VDS = -15 V, VGS = -4.5 V, ID = -2 A 2
Turn-on delay time (N-Ch) td(on) 5 8 ns VDD = 15 V, RL = 15, ID ≈ 1 A, VGEN = 10 V, Rg = 6 2
Turn-on delay time (P-Ch) td(on) 5 8 ns VDD = -15 V, RL = 15, ID ≈ -1 A, VGEN = -10 V, Rg = 6 2
Rise time (N-Ch) tr 12 23 ns 2
Rise time (P-Ch) tr 15 23 ns 2
Turn-off delay time (N-Ch) td(off) 13 23 ns 2
Turn-off delay time (P-Ch) td(off) 20 30 ns 2
Fall time (N-Ch) tf 7 12 ns 2
Fall time (P-Ch) tf 20 30 ns 2
Source-drain reverse recovery time (N-Ch) trr 15 25 ns IF = 1.05 A, di/dt = 100 A/μs 2
Source-drain reverse recovery time (P-Ch) trr 18 30 ns IF = -1.05 A, di/dt = 100 A/μs 2

CAD (KiCad official)

  • Symbol: SI3590DV-T1-GE3
  • Footprint: Package_SO:TSOP-6_1.65x3.05mm_P0.95mm
  • 3D model: TSOP-6 (KiCad packages3D, STEP)
  • 3D model files: si3590dv-t1-ge3-etched.step / si3590dv-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si3590dv-t1-ge3.step / si3590dv-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (13 pp, sha256 ca3ae2c3859cfa71, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF