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Si2302CDS-T1-GE3

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Vishay Intertech MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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README.md si2302cds-t1-ge3: specified limits as data (metadata.characteristics, 34 rows from the datasheet) · Ray 26d ago
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si2302cds-t1-ge3-etched.step si2302cds-t1-ge3: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC… · Ray 22d ago
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Si2302CDS-T1-GE3

Vishay Intertech · MOSFETs · SOT-23

Si2302CDS-T1-GE3 from Vishay Intertech, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate terminal; VGS(th) = 0.40 V (min) to 0.85 V (max) at VDS = VGS, ID = 250 µA; absolute maximum VGS = ±8 V; gate-body leakage IGSS = ±100 nA max at VGS = ±8 V.
2 S passive Source terminal; body diode anode; maximum continuous source current (diode conduction) IS = 0.72 A (5 s) / 0.6 A steady state at TA = 25 °C; body diode forward voltage VSD = 0.7 V typ / 1.2 V max at IS = 0.95 A.
3 D passive Drain terminal; VDS(max) = 20 V; continuous drain current ID = 2.9 A (5 s) / 2.6 A steady state at TA = 25 °C; RDS(on) = 0.057 Ω max at VGS = 4.5 V, ID = 3.6 A.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage VDS 20 V VGS = 0 V, ID = 250 µA 2
Gate-Threshold Voltage VGS(th) 0.4 0.85 V VDS = VGS, ID = 250 µA 2
Gate-Body Leakage IGSS -100 100 nA VDS = 0 V, VGS = ±8 V 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 20 V, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS 75 µA VDS = 20 V, VGS = 0 V, TJ = 70 °C 2
On-State Drain Current ID(on) 6 A VDS ≥ 10 V, VGS = 4.5 V 2
Drain-Source On-Resistance RDS(on) 0.045 0.057 Ω VGS = 4.5 V, ID = 3.6 A 2
Drain-Source On-Resistance RDS(on) 0.056 0.075 Ω VGS = 2.5 V, ID = 3.1 A 2
Diode Forward Voltage VSD 0.7 1.2 V IS = 0.95 A, VGS = 0 V 2
Total Gate Charge Qg 3.5 5.5 nC VDS = 10 V, VGS = 4.5 V, ID = 3.6 A 2
Gate Resistance Rg 2 4 8 Ω f = 1.0 MHz 2
Turn-On Delay Time td(on) 8 15 ns VDD = 10 V, RL = 2.78 Ω, ID ≅ 3.6 A, VGEN = 4.5 V, Rg = 1 Ω 2
Rise Time tr 7 15 ns VDD = 10 V, RL = 2.78 Ω, ID ≅ 3.6 A, VGEN = 4.5 V, Rg = 1 Ω 2
Turn-Off Delay Time td(off) 30 45 ns VDD = 10 V, RL = 2.78 Ω, ID ≅ 3.6 A, VGEN = 4.5 V, Rg = 1 Ω 2
Fall Time tf 7 15 ns VDD = 10 V, RL = 2.78 Ω, ID ≅ 3.6 A, VGEN = 4.5 V, Rg = 1 Ω 2
Source-Drain Reverse Recovery Time trr 8.5 15 ns IF = 3.6 A, dI/dt = 100 A/µs 2
Body Diode Reverse Recovery Charge Qrr 2 4 nC 2
Drain-Source Voltage VDS 20 V TA = 25 °C 1
Gate-Source Voltage VGS -8 8 V 1
Continuous Drain Current (TJ = 150 °C) ID 2.9 A TA = 25 °C, t ≤ 5 s 1
Continuous Drain Current (TJ = 150 °C) ID 2.6 A TA = 25 °C, steady state 1
Continuous Drain Current (TJ = 150 °C) ID 2.3 A TA = 70 °C, t ≤ 5 s 1
Continuous Drain Current (TJ = 150 °C) ID 2.1 A TA = 70 °C, steady state 1
Pulsed Drain Current IDM 10 A Pulse width limited by maximum junction temperature 1
Continuous Source Current (Diode Conduction) IS 0.72 A t ≤ 5 s, TA = 25 °C 1
Continuous Source Current (Diode Conduction) IS 0.6 A steady state, TA = 25 °C 1
Power Dissipation PD 0.86 W TA = 25 °C, t ≤ 5 s 1
Power Dissipation PD 0.71 W TA = 25 °C, steady state 1
Power Dissipation PD 0.55 W TA = 70 °C, t ≤ 5 s 1
Power Dissipation PD 0.46 W TA = 70 °C, steady state 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Maximum Junction-to-Ambient RthJA 120 145 °C/W t ≤ 5 s 1
Maximum Junction-to-Ambient RthJA 140 175 °C/W Steady State 1
Maximum Junction-to-Foot RthJF 62 78 °C/W Steady State 1

CAD (KiCad official)

  • Symbol: Si2302CDS-T1-GE3
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: si2302cds-t1-ge3-etched.step / si2302cds-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si2302cds-t1-ge3.step / si2302cds-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (5 pp, sha256 9725799abadf1dba, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF