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SI1032X-T1-GE3

Public Made by Adom

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Vishay Intertech MOSFETs, SC-89-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SI1032X-T1-GE3

Vishay Intertech · MOSFETs · SC-89-3

SI1032X-T1-GE3 from Vishay Intertech, in a SC-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage is rated at ±6 V maximum with 2000 V HBM ESD protection, and threshold is 0.40 V min to 1.2 V max at 250 µA.
2 S passive Source; continuous source (diode conduction) current is 240 mA steady state for Si1032X.
3 D passive Drain; drain-source voltage is rated at 20 V, with continuous drain current of 200 mA steady state at TA = 25 °C for Si1032X.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SC-89-3
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 20 V 1
Gate-Source Voltage VGS -6 6 V 1
Continuous Drain Current ID 210 mA TJ = 150 °C, TA = 25 °C, 5 s 1
Continuous Drain Current ID 200 mA TJ = 150 °C, TA = 25 °C, steady state 1
Continuous Drain Current ID 150 mA TJ = 150 °C, TA = 85 °C, 5 s 1
Continuous Drain Current ID 140 mA TJ = 150 °C, TA = 85 °C, steady state 1
Pulsed Drain Current IDM 600 mA Pulse test, note a 1
Continuous Source Current (Diode Conduction) IS 300 mA 5 s 1
Continuous Source Current (Diode Conduction) IS 240 mA steady state 1
Maximum Power Dissipation PD 340 mW TA = 25 °C, 5 s 1
Maximum Power Dissipation PD 300 mW TA = 25 °C, steady state 1
Maximum Power Dissipation PD 170 mW TA = 85 °C, 5 s 1
Maximum Power Dissipation PD 150 mW TA = 85 °C, steady state 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Gate-Source ESD Rating (HBM, Method 3015) ESD 2000 V HBM, Method 3015 1
Gate Threshold Voltage VGS(th) 0.4 0.7 1.2 V VDS = VGS, ID = 250 µA 2
Gate-Body Leakage IGSS -1 0.5 1 µA VDS = 0 V, VGS = ±2.8 V 2
Gate-Body Leakage IGSS -3 1 3 µA VDS = 0 V, VGS = ±4.5 V 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 20 V, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS 10 µA VDS = 20 V, VGS = 0 V, TJ = 55 °C 2
On-State Drain Current ID(on) 250 mA VDS = 5 V, VGS = 4.5 V 2
Drain-Source On-State Resistance RDS(on) 5 Ω VGS = 4.5 V, ID = 200 mA 2
Drain-Source On-State Resistance RDS(on) 7 Ω VGS = 2.5 V, ID = 175 mA 2
Drain-Source On-State Resistance RDS(on) 9 Ω VGS = 1.8 V, ID = 150 mA 2
Drain-Source On-State Resistance RDS(on) 10 Ω VGS = 1.5 V, ID = 40 mA 2
Forward Transconductance gfs 0.5 S VDS = 10 V, ID = 200 mA 2
Diode Forward Voltage VSD 1.2 V IS = 150 mA, VGS = 0 V 2
Total Gate Charge Qg 750 pC VDS = 10 V, VGS = 4.5 V, ID = 250 mA 2
Gate-Source Charge Qgs 75 pC VDS = 10 V, VGS = 4.5 V, ID = 250 mA 2
Gate-Drain Charge Qgd 225 pC VDS = 10 V, VGS = 4.5 V, ID = 250 mA 2
Turn-On Delay Time td(on) 50 ns VDD = 10 V, RL = 47 Ω, ID 200 mA, VGEN = 4.5 V, Rg = 10 Ω 2
Rise Time tr 25 ns VDD = 10 V, RL = 47 Ω, ID 200 mA, VGEN = 4.5 V, Rg = 10 Ω 2
Turn-Off Delay Time td(off) 50 ns VDD = 10 V, RL = 47 Ω, ID 200 mA, VGEN = 4.5 V, Rg = 10 Ω 2
Fall Time tf 25 ns VDD = 10 V, RL = 47 Ω, ID 200 mA, VGEN = 4.5 V, Rg = 10 Ω 2

CAD (KiCad official)

  • Symbol: SI1032X-T1-GE3
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SC-89-3 (KiCad packages3D, STEP)
  • 3D model files: si1032x-t1-ge3-etched.step / si1032x-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si1032x-t1-ge3.step / si1032x-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (7 pp, sha256 20a563152abd25ed, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF