component

SH8K41GZETB

Public Made by Adom

by adom

ROHM Semicon MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttriode-mos tube-transistorsh8k41gzetbfactory-2.0.0extractor-text

Verified SH8K41GZETB

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SH8K41GZETB · SOP-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 14-page datasheet
  • ✓distributor: lcsc C2937428, digikey SH8K41GZETBTR-ND, mouser 755-SH8K41GZETB
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-0kg4h24e/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ sh8k41gzetb.kicad_sym✓ sh8k41gzetb.kicad_mod✓ sh8k41gzetb.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 6d ago
viewers sh8k41gzetb: viewers · Ray 6d ago
package.json Publish 0.1.0 · Ray 6d ago
page.json Set visibility: public · Ray 6d ago
README.md Publish 0.1.0 · Ray 6d ago
sh8k41gzetb-etched.glb Publish 0.1.0 · Ray 6d ago
sh8k41gzetb-etched.step sh8k41gzetb: factory component page (tier=mfr) · Ray 6d ago
sh8k41gzetb-hero.glb sh8k41gzetb: hero GLB from the etched model (keeps the MPN mark) · Ray 6d ago
sh8k41gzetb-hero.overlay.json Publish 0.1.0 · Ray 6d ago
sh8k41gzetb.glb Publish 0.1.0 · Ray 6d ago
sh8k41gzetb.kicad_mod Publish 0.1.0 · Ray 6d ago
sh8k41gzetb.kicad_sym Publish 0.1.0 · Ray 6d ago
sh8k41gzetb.lbr Publish 0.1.0 · Ray 6d ago
sh8k41gzetb.step Publish 0.1.0 · Ray 6d ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 6d ago

SH8K41GZETB

ROHM Semicon · MOSFETs · SOP-8

SH8K41GZETB from ROHM Semicon, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Tr1 source terminal of the first Nch MOSFET (VDSS 80V, ID ±3.4A).
2 G1 input Tr1 gate terminal with ESD protection diode; VGSS limit ±20V, threshold 1.0 to 2.5V.
3 S2 passive Tr2 source terminal of the second Nch MOSFET (VDSS 80V, ID ±3.4A).
4 G2 input Tr2 gate terminal with ESD protection diode; VGSS limit ±20V, threshold 1.0 to 2.5V.
5 D2 passive Tr2 drain terminal; VDSS 80V, continuous drain current ±3.4A, pulsed ±13.6A.
6 D2 passive Tr2 drain terminal (second drain pin, tied internally to pin 5); VDSS 80V, ±3.4A continuous.
7 D1 passive Tr1 drain terminal; VDSS 80V, continuous drain current ±3.4A, pulsed ±13.6A.
8 D1 passive Tr1 drain terminal (second drain pin, tied internally to pin 7); VDSS 80V, ±3.4A continuous.

Key specifications

Parameter Value
Manufacturer ROHM Semicon
Package SOP-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source voltage VDSS 80 V Ta = 25°C 1
Continuous drain current ID -3.4 3.4 A Ta = 25°C 1
Pulsed drain current IDP -13.6 13.6 A Pw ≦ 10μs, Duty cycle ≦ 1% 1
Gate-Source voltage VGSS -20 20 V Ta = 25°C 1
Power dissipation (total), ceramic board PD 2 W Mounted on a ceramic board (30×30×0.8mm) 1
Power dissipation (total), FR4 PD 1.4 W Mounted on a FR4 (25×25×0.8mm) 1
Junction temperature Tj 150 °C 1
Operating junction and storage temperature range Tstg -55 150 °C 1
Thermal resistance junction-ambient (total), ceramic board RthJA 62.5 ℃/W Mounted on a ceramic board (30×30×0.8mm) 2
Thermal resistance junction-ambient (total), FR4 RthJA 89.2 ℃/W Mounted on a FR4 (25×25×0.8mm) 2
Drain-Source breakdown voltage V(BR)DSS 80 V VGS = 0V, ID = 1mA 2
Zero gate voltage drain current IDSS 1 μA VDS = 80V, VGS = 0V 2
Gate-Source leakage current IGSS -10 10 μA VDS = 0V, VGS = ±20V 2
Gate threshold voltage VGS(th) 1 2.5 V VDS = 10V, ID = 1mA 2
Static drain-source on-state resistance RDS(on) 90 130 mΩ VGS = 10V, ID = 3.4A 2
Static drain-source on-state resistance RDS(on) 110 150 mΩ VGS = 4.5V, ID = 3.4A 2
Static drain-source on-state resistance RDS(on) 120 160 mΩ VGS = 4.0V, ID = 3.4A 2
Forward transfer admittance /Yfs/ 3 S VDS = 10V, ID = 3.4A, pulsed 2
Body diode continuous forward current IS 1.6 A Ta = 25℃ 3
Body diode pulse forward current ISP 13.6 A Pw ≦ 10μs, Duty cycle ≦ 1% 3
Body diode forward voltage VSD 1.2 V VGS = 0V, IS = 1.6A 3
Breakdown voltage temperature coefficient ΔV(BR)DSS/ΔTj 81.3 mV/℃ ID = 1mA referenced to 25℃ 2
Gate threshold voltage temperature coefficient ΔVGS(th)/ΔTj -4.4 mV/℃ ID = 1mA referenced to 25℃ 2
Gate resistance RG 5 Ω f = 1MHz, open drain 2
Input capacitance Ciss 600 pF VGS = 0V, VDS = 10V, f = 1MHz 3
Output capacitance Coss 100 pF VGS = 0V, VDS = 10V, f = 1MHz 3
Reverse transfer capacitance Crss 40 pF VGS = 0V, VDS = 10V, f = 1MHz 3
Turn-on delay time td(on) 12 ns VDD ⋍ 40V, VGS = 10V, ID = 1.7A, RL = 24Ω, RG = 10Ω 3
Rise time tr 15 ns VDD ⋍ 40V, VGS = 10V, ID = 1.7A, RL = 24Ω, RG = 10Ω 3
Turn-off delay time td(off) 40 ns VDD ⋍ 40V, VGS = 10V, ID = 1.7A, RL = 24Ω, RG = 10Ω 3
Fall time tf 12 ns VDD ⋍ 40V, VGS = 10V, ID = 1.7A, RL = 24Ω, RG = 10Ω 3
Total gate charge Qg 6.6 nC VDD ⋍ 40V, ID = 3.4A, VGS = 5.0V 3
Gate-Source charge Qgs 1.8 nC VDD ⋍ 40V, ID = 3.4A, VGS = 5.0V 3
Gate-Drain charge Qgd 2.2 nC VDD ⋍ 40V, ID = 3.4A, VGS = 5.0V 3

CAD (KiCad official)

  • Symbol: SH8K41GZETB
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: sh8k41gzetb-etched.step / sh8k41gzetb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sh8k41gzetb.step / sh8k41gzetb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ROHM Semicon datasheet (14 pp, sha256 68246ac045b87db4, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF