SGM3209YS8G

{
  "slug": "sgm3209ys8g",
  "version": "0.1.0",
  "type": "component",
  "description": "SGMICRO DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "sgm3209ys8g",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sgm3209ys8g.kicad_sym",
    "sgm3209ys8g.kicad_mod",
    "sgm3209ys8g.glb",
    "sgm3209ys8g.step",
    "sgm3209ys8g.lbr",
    "docs/hero.png",
    "docs/sgm3209ys8g-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "sgm3209ys8g-hero.glb",
    "sgm3209ys8g-hero.overlay.json",
    "sgm3209ys8g-etched.glb"
  ],
  "component": {
    "mpn": "SGM3209YS8G",
    "manufacturer": "SGMICRO",
    "package": "SOIC-8",
    "pin_count": 8,
    "category": "Power Management (PMIC)",
    "subcategory": "DC-DC Converters",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589835861379342336",
    "parts": {
      "symbol": "sgm3209ys8g.kicad_sym",
      "footprint": "sgm3209ys8g.kicad_mod",
      "model_3d": "sgm3209ys8g-hero.glb",
      "model_3d_plain": "sgm3209ys8g-etched.glb",
      "model_3d_step": "sgm3209ys8g-etched.step",
      "model_3d_step_plain": "sgm3209ys8g.step",
      "lbr": "sgm3209ys8g.lbr"
    },
    "distributor_links": {
      "lcsc": "C5141293"
    },
    "distributor_check": {
      "checked_at": "2026-10-17T14:59:49Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "NC",
        "type": "unconnected",
        "description": "No connection."
      },
      {
        "number": "2",
        "name": "CFLY+",
        "type": "passive",
        "description": "Positive terminal of the flying capacitor, which connects to the external CFLY (10µF in the typical application)."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for the device."
      },
      {
        "number": "4",
        "name": "CFLY-",
        "type": "passive",
        "description": "Negative terminal of the flying capacitor, which connects to the external CFLY (10µF in the typical application)."
      },
      {
        "number": "5",
        "name": "OUT",
        "type": "power_out",
        "description": "Output pin that delivers the generated negative supply (-3V to -18V for an input of 3V to 18V), rated up to 100mA."
      },
      {
        "number": "6",
        "name": "EN",
        "type": "input",
        "description": "Enable control pin: logic high enables the chip and logic low shuts it down; it has an internal 600kΩ pull-low resistor."
      },
      {
        "number": "7",
        "name": "RP",
        "type": "passive",
        "description": "Switching frequency setting pin; connect one resistor (RSET) between RP and GND, located very close to the pin, to program the frequency from 120kHz to 1.25MHz."
      },
      {
        "number": "8",
        "name": "IN",
        "type": "power_in",
        "description": "Power input pin, with an input voltage range of 3V to 18V (absolute maximum -0.3V to 22V to GND)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The SOIC-8 pin-configuration drawing on page 3 has garbled text, so the SOIC-8 pin numbers and names; The datasheet lists an Exposed Pad (NC) only for the TDFN-2x2-8L package. The SOIC-8 has no exposed ; Pin types for CFLY+, CFLY-, and RP are not stated in the datasheet. They were classified as passive "
        ],
        "pages_sent": 12,
        "cost_usd": 0.0406,
        "at": "2026-10-17T14:57:59"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589835861379342336",
        "pages": 12,
        "sha256": "d1a99397bd000a59",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "sgm3209ys8g.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sgm3209ys8g-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "27e64d000ee161c83df9e16dd6ae096ba9dc528cb360096cc284cb19aa15f1c4",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}