component
SE3082G
Public Made by Adomby adom
SINO IC MOSFETs, DFN-8(5.2x5.6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SE3082G
SINO IC · MOSFETs · DFN-8(5.2x5.6)
SE3082G from SINO IC, in a DFN-8(5.2x5.6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of MOSFET 1; pin 1 is the corner marked with the dot, at the bottom-left of the drawing. |
| 2 | G1 | input | Gate of MOSFET 1; VGS rating is ±20 V. |
| 3 | S2 | passive | Source of MOSFET 2. |
| 4 | G2 | input | Gate of MOSFET 2; VGS rating is ±20 V. |
| 5 | D2 | passive | Drain of MOSFET 2; the datasheet gives VDS of 30 V. |
| 6 | D2 | passive | Drain of MOSFET 2, joined to the other D2 pin; the datasheet gives VDS of 30 V. |
| 7 | D1 | passive | Drain of MOSFET 1; the datasheet gives VDS of 30 V. |
| 8 | D1 | passive | Drain of MOSFET 1, joined to the other D1 pin; the datasheet gives VDS of 30 V. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SINO IC |
| Package | DFN-8(5.2x5.6) |
| Category | Transistors/Thyristors |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | 30 | V | ID=250μA, VGS=0 V | 2 | ||
| Drain to Source Leakage Current | IDSS | 1 | μA | VDS=32V, VGS=0V | 2 | ||
| Gate-Body Leakage Current | IGSS | 100 | nA | VGS=20V | 2 | ||
| Gate Threshold Voltage | VGS(th) | 1 | 1.6 | 3 | V | VDS= VGS, ID=250μA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | 5 | 7.5 | mΩ | VGS=10V, ID=25A | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 7.5 | 9 | mΩ | VGS=4.5V, ID=25A | 2 | |
| Forward Transconductance | gfs | 20 | S | VDS=5V, ID=24A | 2 | ||
| Drain-Source Voltage | VDS | 30 | V | 1 | |||
| Gate-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Drain Current Continuous | ID | 80 | A | 1 | |||
| Drain Current Pulsed | ID | 170 | A | 1 | |||
| Total Power Dissipation | PD | 3.1 | W | TA=25℃ | 1 | ||
| Operating Junction Temperature Range | TJ | -55 | 150 | ℃ | 1 | ||
| Junction to Case Thermal Resistance | RθJC | 1 | ℃/W | 1 | |||
| Junction to Ambient Thermal Resistance | RθJA | 40 | ℃/W | 1 |
CAD (KiCad official)
- Symbol:
SE3082G - Footprint:
Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm - 3D model: DFN-8(5.2x5.6) (KiCad packages3D, STEP)
- 3D model files:
se3082g-etched.step/se3082g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);se3082g.step/se3082g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SINO IC datasheet (6 pp, sha256
6499ef20bcee060a, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SE3082G
**SINO IC** · MOSFETs · DFN-8(5.2x5.6)
SE3082G from SINO IC, in a DFN-8(5.2x5.6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of MOSFET 1; pin 1 is the corner marked with the dot, at the bottom-left of the drawing. |
| 2 | G1 | input | Gate of MOSFET 1; VGS rating is ±20 V. |
| 3 | S2 | passive | Source of MOSFET 2. |
| 4 | G2 | input | Gate of MOSFET 2; VGS rating is ±20 V. |
| 5 | D2 | passive | Drain of MOSFET 2; the datasheet gives VDS of 30 V. |
| 6 | D2 | passive | Drain of MOSFET 2, joined to the other D2 pin; the datasheet gives VDS of 30 V. |
| 7 | D1 | passive | Drain of MOSFET 1; the datasheet gives VDS of 30 V. |
| 8 | D1 | passive | Drain of MOSFET 1, joined to the other D1 pin; the datasheet gives VDS of 30 V. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SINO IC |
| Package | DFN-8(5.2x5.6) |
| Category | Transistors/Thyristors |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | 30 | | | V | ID=250μA, VGS=0 V | 2 |
| Drain to Source Leakage Current | IDSS | | | 1 | μA | VDS=32V, VGS=0V | 2 |
| Gate-Body Leakage Current | IGSS | | | 100 | nA | VGS=20V | 2 |
| Gate Threshold Voltage | VGS(th) | 1 | 1.6 | 3 | V | VDS= VGS, ID=250μA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | 5 | 7.5 | mΩ | VGS=10V, ID=25A | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | 7.5 | 9 | mΩ | VGS=4.5V, ID=25A | 2 |
| Forward Transconductance | gfs | 20 | | | S | VDS=5V, ID=24A | 2 |
| Drain-Source Voltage | VDS | | | 30 | V | | 1 |
| Gate-Source Voltage | VGS | -20 | | 20 | V | | 1 |
| Drain Current Continuous | ID | | | 80 | A | | 1 |
| Drain Current Pulsed | ID | | | 170 | A | | 1 |
| Total Power Dissipation | PD | | | 3.1 | W | TA=25℃ | 1 |
| Operating Junction Temperature Range | TJ | -55 | | 150 | ℃ | | 1 |
| Junction to Case Thermal Resistance | RθJC | | | 1 | ℃/W | | 1 |
| Junction to Ambient Thermal Resistance | RθJA | | | 40 | ℃/W | | 1 |
## CAD (KiCad official)
- Symbol: `SE3082G`
- Footprint: `Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm`
- 3D model: DFN-8(5.2x5.6) (KiCad packages3D, STEP)
- 3D model files: `se3082g-etched.step` / `se3082g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `se3082g.step` / `se3082g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [SINO IC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8674355815597625344) (6 pp, sha256 `6499ef20bcee060a`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/se3082g-datasheet.pdf)