SD2057

{
  "slug": "sd2057",
  "version": "0.1.0",
  "type": "component",
  "description": "Hangzhou SDIC Microelectronics Interface - Specialized, QFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "interface",
    "sd2057",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sd2057.kicad_sym",
    "sd2057.kicad_mod",
    "sd2057.glb",
    "sd2057.step",
    "sd2057.lbr",
    "docs/hero.png",
    "docs/sd2057-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "sd2057-hero.glb",
    "sd2057-hero.overlay.json",
    "sd2057-etched.glb"
  ],
  "component": {
    "mpn": "SD2057",
    "manufacturer": "Hangzhou SDIC Microelectronics",
    "package": "QFN-24-EP(4x4)",
    "pin_count": 25,
    "category": "Interface",
    "subcategory": "Interface - Specialized",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884631110225920",
    "parts": {
      "symbol": "sd2057.kicad_sym",
      "footprint": "sd2057.kicad_mod",
      "model_3d": "sd2057-hero.glb",
      "model_3d_plain": "sd2057-etched.glb",
      "model_3d_step": "sd2057-etched.step",
      "model_3d_step_plain": "sd2057.step",
      "lbr": "sd2057.lbr"
    },
    "distributor_links": {
      "lcsc": "C414104"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T01:37:38Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "XTAL_ENb",
        "type": "input",
        "description": "Active-low crystal oscillator enable that, together with CLK_CFG0/CLK_CFG1, selects the clock configuration per Table 2."
      },
      {
        "number": "2",
        "name": "CLKOUT",
        "type": "output",
        "description": "Clock output at the DVDD logic level, selectable per Table 2; driving its load adds supply current (I = C×V×f), so the load should be kept small."
      },
      {
        "number": "3",
        "name": "CLK_CFG0",
        "type": "input",
        "description": "Clock configuration control input that selects the system clock and CLKOUT mode per Table 2."
      },
      {
        "number": "4",
        "name": "CLK_CFG1",
        "type": "input",
        "description": "Clock configuration control input that selects the system clock and CLKOUT mode per Table 2."
      },
      {
        "number": "5",
        "name": "RESETb",
        "type": "input",
        "description": "Active-low chip reset; when low the device enters power-save mode with maximum 5 µA consumption, and it may be tied to DVDD if reset is not used."
      },
      {
        "number": "6",
        "name": "CD",
        "type": "output",
        "description": "Carrier detect output that is high when a valid carrier is present on HART_IN."
      },
      {
        "number": "7",
        "name": "TXD",
        "type": "input",
        "description": "Transmit data NRZ input to the modulator, whose modulated output is sent on HART_OUT."
      },
      {
        "number": "8",
        "name": "RTSb",
        "type": "input",
        "description": "Active-low request-to-send that enables the modulator and disables the demodulator (transmit mode); high enables the demodulator and disables the modulator (receive mode)."
      },
      {
        "number": "9",
        "name": "DUPLEX",
        "type": "input",
        "description": "Active-high full-duplex enable; with RTSb low it enables simultaneous modulator and demodulator operation for loopback self-test."
      },
      {
        "number": "10",
        "name": "RXD",
        "type": "output",
        "description": "Demodulated HART data output sent to the external UART."
      },
      {
        "number": "11",
        "name": "DVDD",
        "type": "power_in",
        "description": "Digital supply, which must be the same voltage as AVDD (2.7 to 5.5 V); decouple with parallel 1 µF and 0.1 µF low-ESR capacitors."
      },
      {
        "number": "12",
        "name": "DVSS",
        "type": "power_in",
        "description": "Digital ground that must be connected to AVSS."
      },
      {
        "number": "13",
        "name": "REG_CAP",
        "type": "output",
        "description": "Output of the internal LDO (about 2 V) supplying the digital core; decouple with a 1 µF ceramic capacitor to DVSS."
      },
      {
        "number": "14",
        "name": "HART_OUT",
        "type": "output",
        "description": "HART FSK output to the 4-20 mA loop with 0.75 V DC level and 0.5-1.0 V swing; use 4.7 nF to 68 nF capacitive load, and maximum resistive load is 160 Ω."
      },
      {
        "number": "15",
        "name": "REF",
        "type": "bidirectional",
        "description": "Internal 1.5 V reference output, or external 2.5 V reference input when REF_EN is low; decouple with 1 µF to AVSS."
      },
      {
        "number": "16",
        "name": "HART_IN",
        "type": "input",
        "description": "HART FSK input from the 4-20 mA loop with an input range of 0 to 1.5 V when the internal reference is used."
      },
      {
        "number": "17",
        "name": "ADC_IP",
        "type": "input",
        "description": "ADC input fed from an external bandpass filter output; when the internal filter is used, connect a 680 pF capacitor to AVSS."
      },
      {
        "number": "18",
        "name": "AVDD",
        "type": "power_in",
        "description": "Analog supply (2.7 to 5.5 V) that must match DVDD; decouple with parallel 1 µF and 0.1 µF low-ESR capacitors."
      },
      {
        "number": "19",
        "name": "AVSS",
        "type": "power_in",
        "description": "Analog ground."
      },
      {
        "number": "20",
        "name": "XTAL2",
        "type": "output",
        "description": "Crystal connection for the external 3.6864 MHz crystal; leave open when an external CMOS clock is applied to XTAL1."
      },
      {
        "number": "21",
        "name": "XTAL1",
        "type": "input",
        "description": "Crystal connection for the 3.6864 MHz oscillator or external CMOS clock input."
      },
      {
        "number": "22",
        "name": "DVSS",
        "type": "power_in",
        "description": "Digital ground that must be connected to AVSS."
      },
      {
        "number": "23",
        "name": "REF_EN",
        "type": "input",
        "description": "Reference enable; high enables the internal 1.5 V reference and buffer, low disables them and requires an external 2.5 V buffered reference on REF."
      },
      {
        "number": "24",
        "name": "FILTER_SEL",
        "type": "input",
        "description": "Bandpass filter select; high enables the internal filter with HART signal on HART_IN, low disables it and requires an external filter output on ADC_IP."
      },
      {
        "number": "25",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The pin-number mapping was taken from the Table 1 pin description (序号 column). The text extraction o; The datasheet lists REF as an analog output, but it also accepts an external 2.5 V reference input w; XTAL2 is described as an analog output (crystal pin) that is left floating with an external clock; t",
          "exposed pad 25 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint",
          "1/25 pin names appear NOWHERE in the datasheet text: ['21:XTAL1@p2']"
        ],
        "pages_sent": 12,
        "cost_usd": 0.0736,
        "at": "2026-10-18T01:35:43"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884631110225920",
        "pages": 12,
        "sha256": "3d7981dffd44edac",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 25,
        "described": 25,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "sd2057.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "096fc110543e6d324c5120c2d38e3dca87a389da9b6fac234f1fe40856295ef4",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sd2057-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "fca4cecc59e6b98298063eb4ea52f191e887d857cbf1c387625ba074986bbeb6",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}