SCT2620MRER

@@ -1,13 +1,144 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "sct2620mrer",+  "title": "SCT2620MRER",+  "brief": "SCT DC-DC Converters, MSOP-10-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "SCT DC-DC Converters, MSOP-10-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "pmic",     "sct2620mrer"   ],+  "component": {+    "mpn": "SCT2620MRER",+    "manufacturer": "SCT",+    "package": "MSOP-10-EP",+    "pin_count": 11,+    "category": "PMIC",+    "subcategory": "DC-DC Converters",+    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2111120930_SCT-SCT2620MRER_C2912566.pdf",+    "parts": {+      "symbol": "sct2620mrer.kicad_sym",+      "footprint": "sct2620mrer.kicad_mod",+      "model_3d": "sct2620mrer.glb",+      "model_3d_step": "sct2620mrer.step",+      "lbr": "sct2620mrer.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "BOOT",+        "type": "passive",+        "description": "Power supply bias for high-side power MOSFET gate driver. Connect a 0.1 \u00b5F bootstrap capacitor from BOOT to SW; charged when SW voltage is low. Abs max 72 V. BOOT-SW UVLO ~2.5 V."+      },+      {+        "number": "2",+        "name": "VIN",+        "type": "power_in",+        "description": "Input supply voltage, 3.8 V to 60 V (abs max 65 V). Connect a local bypass capacitor from VIN to GND with the shortest possible path to the high-frequency bypass cap."+      },+      {+        "number": "3",+        "name": "EN",+        "type": "input",+        "description": "Enable pin with internal pull-up current (~4 \u00b5A at 1.5 V). Pull below 1.05 V to disable the converter; float or tie to VIN to enable. A resistor divider from VIN to GND on EN sets the programmable input UVLO threshold (VEN_H ~1.2 V)."+      },+      {+        "number": "4",+        "name": "SS/TR",+        "type": "passive",+        "description": "Soft-start and tracking pin. An external capacitor sets the output voltage rise time via a 2.6 \u00b5A charge current. The voltage on this pin overrides the internal 0.8 V reference, enabling tracking/sequencing."+      },+      {+        "number": "5",+        "name": "RT/CLK",+        "type": "bidirectional",+        "description": "Sets the internal oscillator frequency (100 kHz to 1.2 MHz) via a resistor to GND, or accepts an external clock for PLL synchronization (100 kHz to 1.2 MHz). Reverts to resistor-programmed frequency if the external clock stops."+      },+      {+        "number": "6",+        "name": "PWRGD",+        "type": "output",+        "description": "Open-drain power-good output. Asserts low on thermal shutdown, dropout, over-voltage, or EN shutdown. VPG_LOW \u2264 0.1 V at 1 mA sink; leakage \u2264 200 nA at 5 V pull-up. Trips at ~90%/110% of VFB."+      },+      {+        "number": "7",+        "name": "FB",+        "type": "input",+        "description": "Inverting input of the trans-conductance error amplifier. Connect the tap of an external feedback resistor divider from VOUT to GND; regulated to VREF = 0.8 V (typ, \u00b11%)."+      },+      {+        "number": "8",+        "name": "COMP",+        "type": "output",+        "description": "Error amplifier output. Connect an external frequency loop compensation network (typ R-C to GND). Trans-conductance Gm = 240 \u00b5A/V; clamps at 0.47 V (low) / 2.25 V (high)."+      },+      {+        "number": "9",+        "name": "GND",+        "type": "power_in",+        "description": "Device ground. Should be tied to the thermal pad and to the PCB ground plane for proper operation."+      },+      {+        "number": "10",+        "name": "SW",+        "type": "power_out",+        "description": "Regulator switching node - drain of the internal high-side MOSFET (RDSON = 220 m\u03a9 typ). Connect to the external power inductor. Abs max -1 V to 65 V (-5 V for 10 ns transient). Peak current limit ~4.2 A."+      },+      {+        "number": "11",+        "name": "PAD",+        "type": "power_in",+        "description": "Exposed thermal pad, heat dissipation path of the die. Electrically connected to GND (pin 9). Must be soldered to the PCB ground plane for proper operation and optimized thermal performance (\u03b8JA = 62.5 \u00b0C/W)."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2111120930_SCT-SCT2620MRER_C2912566.pdf",+        "pages": 22,+        "sha256": "143e0877463556e0",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 11,+        "described": 11,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "SCT",+      "Package": "MSOP-10-EP",+      "Category": "PMIC",+      "Pins": "11"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "sct2620mrer"+  ],+  "discovery_pitch": "SCT2620MRER (SCT) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +156,5 @@     "docs/sct2620mrer-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file