component
SCT2420STER
Public Made by Adomby adom
SCT DC-DC Converters, ESOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+9−6@@ -32,7 +32,7 @@ "number": "1", "name": "BOOT", "type": "power_in",- "description": "Power supply bias for the high-side power MOSFET gate driver. Connect a 0.1\u00b5F bootstrap capacitor from BOOT to SW. The capacitor is charged when the low-side MOSFET is on or SW voltage is low. Absolute max rating -0.3V to 46V; BOOT-SW max 6V."+ "description": "Power supply bias for the high-side power MOSFET gate driver. Connect a 0.1µF bootstrap capacitor from BOOT to SW. The capacitor is charged when the low-side MOSFET is on or SW voltage is low. Absolute max rating -0.3V to 46V; BOOT-SW max 6V." }, { "number": "2",@@ -44,25 +44,25 @@ "number": "3", "name": "EN", "type": "input",- "description": "Enable pin with internal pull-up current source (1.5\u00b5A at 1V, 5.5\u00b5A at 1.5V). Pull below 1.1V to disable the converter; float or connect to VIN to enable. A resistor divider from VIN to GND on EN sets the input voltage lockout threshold. Enable high threshold typ. 1.18V."+ "description": "Enable pin with internal pull-up current source (1.5µA at 1V, 5.5µA at 1.5V). Pull below 1.1V to disable the converter; float or connect to VIN to enable. A resistor divider from VIN to GND on EN sets the input voltage lockout threshold. Enable high threshold typ. 1.18V." }, { "number": "4", "name": "RT/CLK", "type": "bidirectional",- "description": "Sets the internal oscillator clock frequency or synchronizes to an external clock. Connect a resistor from this pin to ground to set switching frequency (100kHz to 2.2MHz; 200k\u03a9 \u2248 500kHz). Alternatively drive with an external clock (100kHz-2.2MHz) for PLL synchronization; automatically reverts to resistor-programmed frequency if clock stops."+ "description": "Sets the internal oscillator clock frequency or synchronizes to an external clock. Connect a resistor from this pin to ground to set switching frequency (100kHz to 2.2MHz; 200kΩ ≈ 500kHz). Alternatively drive with an external clock (100kHz-2.2MHz) for PLL synchronization; automatically reverts to resistor-programmed frequency if clock stops." }, { "number": "5", "name": "FB", "type": "input",- "description": "Inverting input of the trans-conductance error amplifier. External feedback resistor divider from VOUT to GND sets the output voltage; device regulates FB to the internal 0.8V (\u00b11%) reference."+ "description": "Inverting input of the trans-conductance error amplifier. External feedback resistor divider from VOUT to GND sets the output voltage; device regulates FB to the internal 0.8V (±1%) reference." }, { "number": "6", "name": "COMP", "type": "output",- "description": "Error amplifier output. Connect to the frequency loop compensation network (typically an R-C to GND). COMP high clamp 3V, low clamp 0.4V; EA transconductance 300\u00b5S."+ "description": "Error amplifier output. Connect to the frequency loop compensation network (typically an R-C to GND). COMP high clamp 3V, low clamp 0.4V; EA transconductance 300µS." }, { "number": "7",@@ -144,5 +144,8 @@ "docs/sct2420ster-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }