component
SC4215ASTRT
Public Made by Adomby adom
SEMTECH Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "sc4215astrt",
"version": "0.1.0",
"type": "component",
"description": "SEMTECH Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"power management (pmic)",
"sc4215astrt",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"sc4215astrt.kicad_sym",
"sc4215astrt.kicad_mod",
"sc4215astrt.glb",
"sc4215astrt.step",
"sc4215astrt.lbr",
"docs/hero.png",
"docs/sc4215astrt-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"sc4215astrt-hero.glb",
"sc4215astrt-hero.overlay.json",
"sc4215astrt-etched.glb"
],
"component": {
"mpn": "SC4215ASTRT",
"manufacturer": "SEMTECH",
"package": "SOIC-8-EP",
"pin_count": 9,
"category": "Power Management (PMIC)",
"subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883847454314496",
"parts": {
"symbol": "sc4215astrt.kicad_sym",
"footprint": "sc4215astrt.kicad_mod",
"model_3d": "sc4215astrt-hero.glb",
"model_3d_plain": "sc4215astrt-etched.glb",
"model_3d_step": "sc4215astrt-etched.step",
"model_3d_step_plain": "sc4215astrt.step",
"lbr": "sc4215astrt.lbr"
},
"distributor_links": {
"lcsc": "C353859",
"digikey": "SC4215ASTR-ND",
"mouser": "947-SC4215ASTRT"
},
"distributor_check": {
"checked_at": "2026-10-21T01:30:49Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "SC4215ASTR-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "947-SC4215ASTRT",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "NC",
"type": "unconnected",
"description": "Listed as No Connection in the pin description table, so it is not used by the regulator."
},
{
"number": "2",
"name": "EN",
"type": "input",
"description": "Enable input: pulling this pin below 0.4V turns the regulator off and reduces quiescent current to a fraction of its operating value, the device is enabled if left open, and it should be connected to VIN if not used."
},
{
"number": "3",
"name": "VIN",
"type": "power_in",
"description": "Input voltage must be between (VO + 0.5V) and 6.0V for full-load regulation with a minimum of 1.4V, and a minimum 4.7µF ceramic capacitor should be placed directly at this pin."
},
{
"number": "4",
"name": "NC",
"type": "unconnected",
"description": "Listed as No Connection in the pin description table, so it is not used by the regulator."
},
{
"number": "5",
"name": "NC",
"type": "unconnected",
"description": "Listed as No Connection in the pin description table, so it is not used by the regulator."
},
{
"number": "6",
"name": "VO",
"type": "power_out",
"description": "Power output of the device, and a minimum 10µF capacitor should be placed directly at this pin."
},
{
"number": "7",
"name": "FB",
"type": "input",
"description": "Feedback pin: grounding it sets the output to 1.2V internally, connecting it to VO sets 0.5V, and external feedback resistors set the output by resistor ratio."
},
{
"number": "8",
"name": "GND",
"type": "power_in",
"description": "Reference ground that must be connected to the exposed die pad at the IC pin."
},
{
"number": "9",
"name": "THERMAL PAD",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The exposed thermal pad is listed as THERMAL PAD (heatsinking, connect to ground plane with multiple; The pinout was taken from the Pin Descriptions table on page 6. The Pin Configuration drawing on pag; Pins 1, 4 and 5 are marked NC in the pin table only; the datasheet gives no further detail for them.",
"exposed pad 9 added from the footprint"
],
"pages_sent": 10,
"cost_usd": 0.0341,
"at": "2026-10-21T01:22:04"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883847454314496",
"pages": 10,
"sha256": "96d943e6b70672f8",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 9,
"described": 9,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "sc4215astrt.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.55
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "2d6f7e774e8143e3320cbd59eb5be9f3b7864614644e3b072006e1eb05fb7fa6",
"checked": "2026-10-21",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "sc4215astrt-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.55
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "5be71dc71e074d02f5a66a18f01add108950dfe9cf171f60589f064e9e2c5af3",
"checked": "2026-10-21",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}