S-LMUN5311DW1T1G

{
  "schema_version": 1,
  "type": "component",
  "slug": "s-lmun5311dw1t1g",
  "title": "S-LMUN5311DW1T1G",
  "brief": "LRC Digital Transistors, SOT-363. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "transistors-thyristors",
    "s-lmun5311dw1t1g",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "S-LMUN5311DW1T1G",
    "manufacturer": "LRC",
    "package": "SOT-363",
    "pin_count": 6,
    "category": "Transistors/Thyristors",
    "subcategory": "Digital Transistors",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588906577227497472",
    "parts": {
      "symbol": "s-lmun5311dw1t1g.kicad_sym",
      "footprint": "s-lmun5311dw1t1g.kicad_mod",
      "model_3d": "s-lmun5311dw1t1g-etched.glb",
      "model_3d_plain": "s-lmun5311dw1t1g.glb",
      "model_3d_step": "s-lmun5311dw1t1g-etched.step",
      "model_3d_step_plain": "s-lmun5311dw1t1g.step",
      "lbr": "s-lmun5311dw1t1g.lbr"
    },
    "distributor_links": {
      "lcsc": "C559098"
    },
    "pins": [
      {
        "number": "1",
        "name": "E2",
        "type": "power_in",
        "description": "Emitter of PNP transistor Q2, connected to positive supply voltage for Q2 operation and complementary output."
      },
      {
        "number": "2",
        "name": "B2",
        "type": "input",
        "description": "Base of PNP transistor Q2, input terminal with integrated base bias resistor (10 kΩ for LMUN5311DW1T1G) for Q2 control."
      },
      {
        "number": "3",
        "name": "C1",
        "type": "output",
        "description": "Collector of NPN transistor Q1, output terminal with maximum collector-emitter voltage of 50 Vdc and collector current of 100 mAdc."
      },
      {
        "number": "4",
        "name": "E1",
        "type": "power_in",
        "description": "Emitter of NPN transistor Q1, ground reference terminal providing return current path for Q1."
      },
      {
        "number": "5",
        "name": "B1",
        "type": "input",
        "description": "Base of NPN transistor Q1, input terminal with integrated base bias resistor (10 kΩ for LMUN5311DW1T1G) for Q1 control."
      },
      {
        "number": "6",
        "name": "C2",
        "type": "output",
        "description": "Collector of PNP transistor Q2, output terminal with maximum collector-emitter voltage of 50 Vdc and collector current of 100 mAdc."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.2",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.2",
        "primary_model": "claude-haiku-4-5-20251001",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-4-6",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Transistor type assignments (which device is NPN vs PNP) are inferred from typical SOT-363 complemen",
          "2/6 pins cited to the wrong page (name found elsewhere): ['3:C1@p29', '5:B1@p29']"
        ],
        "pages_sent": 29,
        "cost_usd": 0.305,
        "at": "2026-09-22T10:48:21"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588906577227497472",
        "pages": 29,
        "sha256": "baae4620958e523b",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 6,
        "described": 6,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "s-lmun5311dw1t1g.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.1,
          2.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "045cc95e18ee7a13d1623c3ce6604fc833049bdb4f952f68c26e3c5767d122e4",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "s-lmun5311dw1t1g-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.1,
          2.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "772997600a0b72e4b33b672d9920d2c362a4ed81887df6d371cb4c78533fc9f0",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "LRC",
      "Package": "SOT-363",
      "Category": "Transistors/Thyristors",
      "Pins": "6"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "s-lmun5311dw1t1g"
  ],
  "discovery_pitch": "S-LMUN5311DW1T1G (LRC) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "s-lmun5311dw1t1g.kicad_sym",
    "s-lmun5311dw1t1g.kicad_mod",
    "s-lmun5311dw1t1g.glb",
    "s-lmun5311dw1t1g.step",
    "s-lmun5311dw1t1g.lbr",
    "docs/hero.png",
    "docs/s-lmun5311dw1t1g-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-25T05:27:51.609Z"
}