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Ray Publish 0.1.0 fefc961 17d ago

S-LMBTA56LT1G

LRC · Bipolar (BJT) · SOT-23

S-LMBTA56LT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BASE input Base terminal of the PNP transistor, which controls the device; the datasheet gives no separate limit for this pin.
2 EMITTER passive Emitter terminal of the PNP transistor; the datasheet lists the emitter-base voltage limit VEBO of -4 V for this junction.
3 COLLECTOR passive Collector terminal of the PNP transistor; the datasheet rates collector-emitter voltage VCEO at -80 V and continuous collector current IC at -500 mA.

Key specifications

Parameter Value
Manufacturer LRC
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Collector-Emitter Breakdown Voltage VBR(CEO) -80 V IC = -1 mA, IB = 0 2
Collector-Base Breakdown Voltage VBR(CBO) -80 V IC = -100μA, IE = 0 2
Emitter-Base Breakdown Voltage VBR(EBO) -4 V IE = -100 μA, IC = 0 2
Collector Cutoff Current ICES -0.1 μA VCE = -60 V, IE = 0 2
Collector Cutoff Current ICBO -100 nA VCB = -80 V, IE = 0 2
Emitter-Base cut-off current IEBO -100 nA IC = 0, VEB = -6V 2
Collector-Emitter cutoff Current ICEO -10 μA VCE = -80V, IB = 0 2
DC Current Gain HFE 100 IC = -10 mA, VCE = -1 V 2
Collector-Emitter Saturation Voltage VCE(sat) -0.25 V IC = -100 mA, IB = -10 mA 2
Base-Emitter turn on voltage VBE(on) -1.2 V IC = -100 mA, VCE = -1 V 2
Current-Gain, Bandwidth Product fT 50 MHz IC = -100mA, VCE = -1V, f = 100MHz 2
Output Capacitance Cobo 5.3 pF VCB = -10V, IE = 0, f = 1MHz 2
Input Capacitance Cibo 78 pF VEB = -0.5V, IC = 0, f = 1MHz 2
Collector-Emitter Voltage VCEO -80 V 1
Collector-Base Voltage VCBO -80 V 1
Emitter-Base Voltage VEBO -4 V 1
Collector Current, Continuous IC -500 mA 1
Junction and Storage temperature TJ,Tstg -55 150 ºC 1
Total Device Dissipation, FR-5 Board (Note 1) PD 225 mW FR-5 Board (Note 1) @ TA = 25ºC 1
Derate above 25ºC 1.8 mW/ºC Derate above 25ºC 1
Thermal Resistance, Junction-to-Ambient (Note 1) RθJA 556 ºC/W Junction-to-Ambient (Note 1) 1

CAD (KiCad official)

  • Symbol: S-LMBTA56LT1G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: s-lmbta56lt1g-etched.step / s-lmbta56lt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); s-lmbta56lt1g.step / s-lmbta56lt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (6 pp, sha256 7bc6a910bf65e797, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF