← Commit history

orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C425783). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.

Ray ·87f35c7d77 · ·parent 1c5257a
2 files changed +30−10
page.json+8−6
@@ -26,7 +26,9 @@       "model_3d_step": "rt9059gsp.step",       "lbr": "rt9059gsp.lbr"     },-    "distributor_links": {},+    "distributor_links": {+      "lcsc": "C425783"+    },     "pins": [       {         "number": "1",@@ -38,19 +40,19 @@         "number": "2",         "name": "EN",         "type": "input",-        "description": "Enable control input. Logic-high (VIH >= 1.2V) enables the regulator; logic-low (VIL <= 0.4V) shuts it down and pulls VOUT low through ~150Ω. Absolute maximum -0.3V to 6V."+        "description": "Enable control input. Logic-high (VIH >= 1.2V) enables the regulator; logic-low (VIL <= 0.4V) shuts it down and pulls VOUT low through ~150\u03a9. Absolute maximum -0.3V to 6V."       },       {         "number": "3",         "name": "VIN",         "type": "power_in",-        "description": "Supply input voltage; source of the regulated output current up to 3A. Operating range 1V to 5.5V. Bypass with a 10μF ceramic capacitor to GND close to the pin."+        "description": "Supply input voltage; source of the regulated output current up to 3A. Operating range 1V to 5.5V. Bypass with a 10\u03bcF ceramic capacitor to GND close to the pin."       },       {         "number": "4",         "name": "VDD",         "type": "power_in",-        "description": "Supply voltage of the internal control circuit. Must satisfy VDD > VOUT + 1.5V; operating range 3V to 5.5V. Bypass with a 1μF ceramic capacitor to GND."+        "description": "Supply voltage of the internal control circuit. Must satisfy VDD > VOUT + 1.5V; operating range 3V to 5.5V. Bypass with a 1\u03bcF ceramic capacitor to GND."       },       {         "number": "5",@@ -62,7 +64,7 @@         "number": "6",         "name": "VOUT",         "type": "power_out",-        "description": "Regulated output voltage, up to 3A load current. Dropout typically 350mV at 3A. Requires a 10μF ceramic output capacitor to GND."+        "description": "Regulated output voltage, up to 3A load current. Dropout typically 350mV at 3A. Requires a 10\u03bcF ceramic output capacitor to GND."       },       {         "number": "7",@@ -80,7 +82,7 @@         "number": "9",         "name": "GND (Exposed Pad)",         "type": "power_in",-        "description": "Exposed thermal pad. Must be soldered to a large PCB copper area connected to GND for maximum power dissipation (θJC = 6.5°C/W, PD = 3.08W @ 25°C)."+        "description": "Exposed thermal pad. Must be soldered to a large PCB copper area connected to GND for maximum power dissipation (\u03b8JC = 6.5\u00b0C/W, PD = 3.08W @ 25\u00b0C)."       }     ],     "provenance": {
rt9059gsp.lbr+22−4
@@ -63,6 +63,18 @@   <smd name="7" x="2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1"/>   <smd name="8" x="2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/>   <smd name="9" x="0.0000" y="-0.0000" dx="2.2900" dy="3.0000" layer="1"/>+  <polygon width="0.1200" layer="21">+    <vertex x="-2.6000" y="2.4700"/>+    <vertex x="-2.8400" y="2.8000"/>+    <vertex x="-2.3600" y="2.8000"/>+  </polygon>+  <polygon width="0.1000" layer="51">+    <vertex x="-0.9750" y="2.4500"/>+    <vertex x="1.9500" y="2.4500"/>+    <vertex x="1.9500" y="-2.4500"/>+    <vertex x="-1.9500" y="-2.4500"/>+    <vertex x="-1.9500" y="1.4750"/>+  </polygon>   <wire x1="-2.0600" y1="2.5600" x2="2.0600" y2="2.5600" width="0.1200" layer="21"/>   <wire x1="-2.0600" y1="2.4650" x2="-2.0600" y2="2.5600" width="0.1200" layer="21"/>   <wire x1="-2.0600" y1="-2.5600" x2="-2.0600" y2="-2.4650" width="0.1200" layer="21"/>@@ -71,7 +83,7 @@   <wire x1="2.0600" y1="-2.5600" x2="-2.0600" y2="-2.5600" width="0.1200" layer="21"/>   <text x="0" y="3.480" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-3.480" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="2.4700"/><vertex x="-2.8400" y="2.8000"/><vertex x="-2.3600" y="2.8000"/></polygon></package>+</package> </packages> <symbols> <symbol name="RT9059GSP">@@ -86,7 +98,7 @@   <pin name="VIN" x="-17.78" y="0" length="middle" direction="pwr"/>   <pin name="VDD" x="-17.78" y="-2.54" length="middle" direction="pwr"/>   <pin name="NC" x="-17.78" y="-5.08" length="middle" direction="io"/>-  <pin name="GND (Exposed Pad)" x="17.78" y="2.54" length="middle" direction="pwr" rot="R180"/>+  <pin name="GND_Exposed_Pad" x="17.78" y="2.54" length="middle" direction="pwr" rot="R180"/>   <pin name="GND" x="17.78" y="0" length="middle" direction="pwr" rot="R180"/>   <pin name="ADJ" x="17.78" y="-2.54" length="middle" direction="in" rot="R180"/>   <pin name="VOUT" x="17.78" y="-5.08" length="middle" direction="out" rot="R180"/>@@ -106,12 +118,18 @@         <connect gate="G$1" pin="VIN" pad="3"/>         <connect gate="G$1" pin="VDD" pad="4"/>         <connect gate="G$1" pin="NC" pad="5"/>-        <connect gate="G$1" pin="GND (Exposed Pad)" pad="9"/>+        <connect gate="G$1" pin="GND_Exposed_Pad" pad="9"/>         <connect gate="G$1" pin="GND" pad="8"/>         <connect gate="G$1" pin="ADJ" pad="7"/>         <connect gate="G$1" pin="VOUT" pad="6"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="RT9059GSP" constant="no"/>+          <attribute name="MANUFACTURER" value="Richtek Tech" constant="no"/>+          <attribute name="LCSC_PN" value="C425783" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>