component
RT9059GSP
Public Made by Adomby adom
Richtek Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.md+4−4@@ -1,8 +1,8 @@ # RT9059GSP -**Unknown** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOP-8-EP+**Richtek Tech** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOP-8-EP -RT9059GSP from Unknown, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.+RT9059GSP from Richtek Tech, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD. ## Pinout @@ -22,7 +22,7 @@ RT9059GSP from Unknown, in a SOP-8-EP. Pinout and pin descriptions extracted fro | Parameter | Value | |---|---|-| Manufacturer | Unknown |+| Manufacturer | Richtek Tech | | Package | SOP-8-EP | | Category | PMIC | | Pins | 9 |@@ -48,7 +48,7 @@ RT9059GSP from Unknown, in a SOP-8-EP. Pinout and pin descriptions extracted fro Data extracted from the manufacturer datasheet, not a distributor listing: -- **Datasheet:** [Unknown datasheet](docs/rt9059gsp-datasheet.pdf) (12 pp, sha256 `498869c640dbc9f4`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet:** [Richtek Tech datasheet](docs/rt9059gsp-datasheet.pdf) (12 pp, sha256 `498869c640dbc9f4`, retrieved 2026-08-17, tier: lcsc) - **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - **CAD:** KiCad official libraries (CC-BY-SA 4.0).
page.json+142−145@@ -1,151 +1,148 @@ {- "schema_version": 1,- "type": "component",- "slug": "rt9059gsp",- "title": "RT9059GSP",- "brief": "Unknown Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",- "version": "0.1.0",- "license": "CC-BY-SA-4.0",- "tags": [- "component",- "pmic",- "rt9059gsp"- ],- "component": {- "mpn": "RT9059GSP",- "manufacturer": "Unknown",- "package": "SOP-8-EP",- "pin_count": 9,- "category": "PMIC",- "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",- "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2203221830_Richtek-Tech-RT9059GSP_C425783.pdf",- "parts": {- "symbol": "rt9059gsp.kicad_sym",- "footprint": "rt9059gsp.kicad_mod",- "model_3d": "rt9059gsp.glb",- "model_3d_step": "rt9059gsp.step",- "lbr": "rt9059gsp.lbr"- },- "distributor_links": {},- "pins": [- {- "number": "1",- "name": "PGOOD",- "type": "output",- "description": "Power good open-drain output. Asserts (high-Z) when VOUT reaches 90% of its rated value (10% falling hysteresis) after a 1ms typical delay. Requires an external pull-up resistor; sink capability 0.2V @ 10mA."- },- {- "number": "2",- "name": "EN",- "type": "input",- "description": "Enable control input. Logic-high (VIH >= 1.2V) enables the regulator; logic-low (VIL <= 0.4V) shuts it down and pulls VOUT low through ~150Ω. Absolute maximum -0.3V to 6V."- },- {- "number": "3",- "name": "VIN",- "type": "power_in",- "description": "Supply input voltage; source of the regulated output current up to 3A. Operating range 1V to 5.5V. Bypass with a 10μF ceramic capacitor to GND close to the pin."- },- {- "number": "4",- "name": "VDD",- "type": "power_in",- "description": "Supply voltage of the internal control circuit. Must satisfy VDD > VOUT + 1.5V; operating range 3V to 5.5V. Bypass with a 1μF ceramic capacitor to GND."- },- {- "number": "5",- "name": "NC",- "type": "unconnected",- "description": "No internal connection. May be left floating or tied to GND for board layout convenience."- },- {- "number": "6",- "name": "VOUT",- "type": "power_out",- "description": "Regulated output voltage, up to 3A load current. Dropout typically 350mV at 3A. Requires a 10μF ceramic output capacitor to GND."- },- {- "number": "7",- "name": "ADJ",- "type": "input",- "description": "Output voltage feedback / setting input for the adjustable version. VOUT = VREF x (R1 + R2) / R2, with VREF = 0.8V typical. Connect the mid-point of the external R1/R2 divider from VOUT to GND."- },- {- "number": "8",- "name": "GND",- "type": "power_in",- "description": "Ground return for the device. Pin 8 and the exposed pad (pin 9) are internally tied to GND."- },- {- "number": "9",- "name": "GND (Exposed Pad)",- "type": "power_in",- "description": "Exposed thermal pad. Must be soldered to a large PCB copper area connected to GND for maximum power dissipation (θJC = 6.5°C/W, PD = 3.08W @ 25°C)."- }- ],- "provenance": {- "extractor": "ds2sf",- "datasheet": {- "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2203221830_Richtek-Tech-RT9059GSP_C425783.pdf",- "pages": 12,- "sha256": "498869c640dbc9f4",- "source_tier": "lcsc"- },- "cad": "KiCad official (CC-BY-SA 4.0)",- "pins": {- "total": 9,- "described": 9,- "cites_pages": true,- "refuses_to_fabricate": true- }- },- "viewers": {- "symbol": "viewers/symbol.html",- "footprint": "viewers/footprint.html"- }- },- "metadata": {- "specs": {- "Manufacturer": "Unknown",- "Package": "SOP-8-EP",- "Category": "PMIC",- "Pins": "9"- }+ "schema_version": 1,+ "type": "component",+ "slug": "rt9059gsp",+ "title": "RT9059GSP",+ "brief": "Richtek Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "version": "0.1.0",+ "license": "CC-BY-SA-4.0",+ "tags": [+ "component",+ "pmic",+ "rt9059gsp"+ ],+ "component": {+ "mpn": "RT9059GSP",+ "manufacturer": "Richtek Tech",+ "package": "SOP-8-EP",+ "pin_count": 9,+ "category": "PMIC",+ "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+ "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2203221830_Richtek-Tech-RT9059GSP_C425783.pdf",+ "parts": {+ "symbol": "rt9059gsp.kicad_sym",+ "footprint": "rt9059gsp.kicad_mod",+ "model_3d": "rt9059gsp.glb",+ "model_3d_step": "rt9059gsp.step",+ "lbr": "rt9059gsp.lbr" },- "sections": [- "hero",- "viewers",- "readme",- "breadcrumbs",- "info"- ],- "discovery_triggers": [- "rt9059gsp"+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "PGOOD",+ "type": "output",+ "description": "Power good open-drain output. Asserts (high-Z) when VOUT reaches 90% of its rated value (10% falling hysteresis) after a 1ms typical delay. Requires an external pull-up resistor; sink capability 0.2V @ 10mA."+ },+ {+ "number": "2",+ "name": "EN",+ "type": "input",+ "description": "Enable control input. Logic-high (VIH >= 1.2V) enables the regulator; logic-low (VIL <= 0.4V) shuts it down and pulls VOUT low through ~150\u03a9. Absolute maximum -0.3V to 6V."+ },+ {+ "number": "3",+ "name": "VIN",+ "type": "power_in",+ "description": "Supply input voltage; source of the regulated output current up to 3A. Operating range 1V to 5.5V. Bypass with a 10\u03bcF ceramic capacitor to GND close to the pin."+ },+ {+ "number": "4",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage of the internal control circuit. Must satisfy VDD > VOUT + 1.5V; operating range 3V to 5.5V. Bypass with a 1\u03bcF ceramic capacitor to GND."+ },+ {+ "number": "5",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection. May be left floating or tied to GND for board layout convenience."+ },+ {+ "number": "6",+ "name": "VOUT",+ "type": "power_out",+ "description": "Regulated output voltage, up to 3A load current. Dropout typically 350mV at 3A. Requires a 10\u03bcF ceramic output capacitor to GND."+ },+ {+ "number": "7",+ "name": "ADJ",+ "type": "input",+ "description": "Output voltage feedback / setting input for the adjustable version. VOUT = VREF x (R1 + R2) / R2, with VREF = 0.8V typical. Connect the mid-point of the external R1/R2 divider from VOUT to GND."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground return for the device. Pin 8 and the exposed pad (pin 9) are internally tied to GND."+ },+ {+ "number": "9",+ "name": "GND (Exposed Pad)",+ "type": "power_in",+ "description": "Exposed thermal pad. Must be soldered to a large PCB copper area connected to GND for maximum power dissipation (\u03b8JC = 6.5\u00b0C/W, PD = 3.08W @ 25\u00b0C)."+ } ],- "discovery_pitch": "RT9059GSP (Unknown) component page with datasheet-verified CAD.",- "author": {- "name": "Ray",- "email": "[email protected]"+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2203221830_Richtek-Tech-RT9059GSP_C425783.pdf",+ "pages": 12,+ "sha256": "498869c640dbc9f4",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 9,+ "described": 9,+ "cites_pages": true,+ "refuses_to_fabricate": true+ } },- "dependencies": {},- "hero": {- "type": "image",- "path": "docs/hero.png"- },- "files": [- "page.json",- "README.md",- "rt9059gsp.kicad_sym",- "rt9059gsp.kicad_mod",- "rt9059gsp.glb",- "rt9059gsp.step",- "rt9059gsp.lbr",- "docs/hero.png",- "docs/rt9059gsp-datasheet.pdf",- "viewers/symbol.html",- "viewers/footprint.html"- ],- "visibility": {- "public": true+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Unknown",+ "Package": "SOP-8-EP",+ "Category": "PMIC",+ "Pins": "9" }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "rt9059gsp"+ ],+ "discovery_pitch": "RT9059GSP (Unknown) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ },+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "rt9059gsp.kicad_sym",+ "rt9059gsp.kicad_mod",+ "rt9059gsp.glb",+ "rt9059gsp.step",+ "rt9059gsp.lbr",+ "docs/hero.png",+ "docs/rt9059gsp-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ] }