RT9045GSP

{
 "schema": "adom.pads/1",
 "slug": "rt9045gsp",
 "footprint": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm",
 "generated_from": {
  "footprint": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm@sha256:5848244c5e72002e",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -2.475,
   -1.905
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm@sha256:5848244c5e72002e"
 },
 "pad_count": 9,
 "symbol_pins": [
  "1",
  "2",
  "3",
  "4",
  "5",
  "6",
  "7",
  "8",
  "9"
 ],
 "paste_apertures": 4,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "VIN",
   "type": "power_in",
   "description": "Input voltage supplying current to the output pin (1V to 5.5V recommended, absolute max 6V). Must be kept lower or equal to VCNTL. Decouple with a large low-ESR ceramic capacitor (typ. 10µF) placed close to the pin.",
   "is_pin1": true,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "GND",
   "type": "power_in",
   "description": "Common ground. Shared with the exposed pad, which must be soldered to a large PCB copper area connected to GND for maximum power dissipation.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "REFEN",
   "type": "input",
   "description": "Reference voltage input and active-low shutdown control pin. Two resistors divide VIN on this pin to program the regulated output voltage (V_OUT = V_REFEN). Pulling this pin to ground (V_REFEN < 0.15V) shuts down the device; typical drive uses an open-drain N-MOSFET such as 2N7002.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "VOUT",
   "type": "power_out",
   "description": "Regulator output, regulated to the REFEN voltage to terminate the DDR bus resistors. Capable of sinking and sourcing up to 1.8A. Requires typ. 10µF ceramic output capacitance to maintain large-signal transient response.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "NC",
   "type": "unconnected",
   "description": "No internal connection. Leave floating or tie to GND.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "VCNTL",
   "type": "power_in",
   "description": "Control/bias supply for internal control circuitry and gate drive to the output power MOSFETs (5V ±5%). Output current drive capability is proportional to VCNTL. Decouple with at least 1µF to GND; VIN must be kept ≤ VCNTL.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "7",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -0.635
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "7",
   "name": "NC",
   "type": "unconnected",
   "description": "No internal connection. Leave floating or tie to GND.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "8",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -1.905
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "8",
   "name": "NC",
   "type": "unconnected",
   "description": "No internal connection. Leave floating or tie to GND.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "9",
   "kind": "smd",
   "shape": "rect",
   "at": [
    0.0,
    0.0
   ],
   "rot": 0.0,
   "size": [
    2.41,
    3.3
   ],
   "layers": [],
   "thermal": true,
   "pin": "9",
   "name": "GND (Exposed Pad)",
   "type": "power_in",
   "description": "Exposed thermal pad on the package underside. Must be soldered to a large PCB copper area connected to GND for proper heat sinking and rated power dissipation (2.51W at TA=25°C, θJA=39.8°C/W).",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}