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RT9045GSP

Public Made by Adom

by adom

Richtek Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs rt9045gsp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json footprint: the shipped SOIC-8 has no thermal pad, but the symbol and the datasheet both show 9 pads. datasheet EP 2.31x… · Ray
page.json rt9045gsp: specified limits as data (metadata.characteristics, 26 rows from the datasheet) · Ray
README.md rt9045gsp: specified limits as data (metadata.characteristics, 26 rows from the datasheet) · Ray
rt9045gsp-etched.fit.json rt9045gsp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
rt9045gsp-etched.glb rt9045gsp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
rt9045gsp-etched.step rt9045gsp: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
rt9045gsp.glb Publish 0.1.0 · Ray
rt9045gsp.kicad_mod footprint: the shipped SOIC-8 has no thermal pad, but the symbol and the datasheet both show 9 pads. datasheet EP 2.31x… · Ray
rt9045gsp.kicad_sym Publish 0.1.0 · Ray
rt9045gsp.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
rt9045gsp.step Publish 0.1.0 · Ray

RT9045GSP

Richtek Tech · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8

RT9045GSP from Richtek Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Input voltage supplying current to the output pin (1V to 5.5V recommended, absolute max 6V). Must be kept lower or equal to VCNTL. Decouple with a large low-ESR ceramic capacitor (typ. 10µF) placed close to the pin.
2 GND power_in Common ground. Shared with the exposed pad, which must be soldered to a large PCB copper area connected to GND for maximum power dissipation.
3 REFEN input Reference voltage input and active-low shutdown control pin. Two resistors divide VIN on this pin to program the regulated output voltage (V_OUT = V_REFEN). Pulling this pin to ground (V_REFEN < 0.15V) shuts down the device; typical drive uses an open-drain N-MOSFET such as 2N7002.
4 VOUT power_out Regulator output, regulated to the REFEN voltage to terminate the DDR bus resistors. Capable of sinking and sourcing up to 1.8A. Requires typ. 10µF ceramic output capacitance to maintain large-signal transient response.
5 NC unconnected No internal connection. Leave floating or tie to GND.
6 VCNTL power_in Control/bias supply for internal control circuitry and gate drive to the output power MOSFETs (5V ±5%). Output current drive capability is proportional to VCNTL. Decouple with at least 1µF to GND; VIN must be kept ≤ VCNTL.
7 NC unconnected No internal connection. Leave floating or tie to GND.
8 NC unconnected No internal connection. Leave floating or tie to GND.
9 GND (Exposed Pad) power_in Exposed thermal pad on the package underside. Must be soldered to a large PCB copper area connected to GND for proper heat sinking and rated power dissipation (2.51W at TA=25°C, θJA=39.8°C/W).

Key specifications

Parameter Value
Manufacturer Richtek Tech
Package SOIC-8
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • RT9045GSP
  • RT9045GSPZSP

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCNTL Operation Current ICNTL 0.7 2.5 mA IOUT = 0A 5
Standby Current ISTBY 20 90 A VREFEN ≤ 0.2V (Shutdown), RLOAD = 180 5
Output Offset Voltage VOS 13 13 mV IOUT = 0A 5
Load Regulation VLOAD 13 13 mV VIN = 1.8V, VREFEN = 0.9V, IOUT = 1.8A; VIN = 1.5V, VREFEN = 0.75V, IOUT = 1.5A; VIN = 1.35V, VREFEN = 0.675V, IOUT = 1.2A; VIN = 1.2V, VREFEN = 0.6V, IOUT = 1.2A 5
Source Current Limit ILIMITsr 1.8 3.5 A VIN = 1.8V, VREFEN = 0.9V; VIN = 1.5V, VREFEN = 0.75V 5
Sink Current Limit ILIMITsk 1.8 3.5 A VIN = 1.8V, VREFEN = 0.9V; VIN = 1.5V, VREFEN = 0.75V 5
Thermal Shutdown Temperature TSD 125 170 °C VCNTL = 5V 6
REFEN Shutdown Threshold, Enable VIH 0.4 V 6
REFEN Shutdown Threshold, Shutdown VIL 0.15 V 6
Input Voltage VIN 1 5.5 V 5
Control Voltage VCNTL 5 V 5
Control Voltage tolerance -5 5 % VCNTL = 5V ± 5% 5
Junction Temperature Range -40 125 °C 5
Ambient Temperature Range -40 85 °C 5
Input Voltage VIN -0.3 6 V 5
Control Voltage VCNTL -0.3 6 V 5
Reference Input Voltage VREFEN -0.3 6 V 5
Output Voltage VOUT -0.3 6 V 5
Power Dissipation, SOP-8 (Exposed Pad) PD 2.51 W TA = 25°C 5
Junction Temperature 150 °C 5
Lead Temperature (Soldering, 10 sec.) 260 °C Soldering, 10 sec. 5
Storage Temperature Range -65 150 °C 5
ESD Susceptibility HBM 2 kV HBM (Human Body Model) 5
ESD Susceptibility MM 200 V MM (Machine Model) 5
Package Thermal Resistance, Junction to Ambient θJA 39.8 °C/W SOP-8 (Exposed Pad); natural convection, TA = 25°C 5
Package Thermal Resistance, Junction to Case θJC 10.1 °C/W SOP-8 (Exposed Pad) 5

CAD (KiCad official)

  • Symbol: RT9045GSP
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: rt9045gsp-etched.step / rt9045gsp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rt9045gsp.step / rt9045gsp.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
rt9045gsp.step 122 KB You want the bare part, or you mark your own boards.
rt9045gsp-etched.step 2.2 MB You want the part with RT9045GSP already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 530 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Richtek Tech datasheet (11 pp, sha256 ecb44d14a5f14751, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF