RT9026GSP

{
  "schema_version": 1,
  "type": "component",
  "slug": "rt9026gsp",
  "title": "RT9026GSP",
  "brief": "Richtek Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "pmic",
    "rt9026gsp"
  ],
  "component": {
    "mpn": "RT9026GSP",
    "manufacturer": "Richtek Tech",
    "package": "SOP-8-EP",
    "pin_count": 9,
    "category": "PMIC",
    "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/66e6a2b33f9b9cfd28fc1368875ff6c4.pdf",
    "parts": {
      "symbol": "rt9026gsp.kicad_sym",
      "footprint": "rt9026gsp.kicad_mod",
      "model_3d": "rt9026gsp-etched.glb",
      "model_3d_plain": "rt9026gsp.glb",
      "model_3d_step": "rt9026gsp-etched.step",
      "model_3d_step_plain": "rt9026gsp.step",
      "lbr": "rt9026gsp.lbr"
    },
    "distributor_links": {
      "lcsc": "C188255"
    },
    "pins": [
      {
        "number": "1",
        "name": "GND",
        "type": "power_in",
        "description": "Ground. Shared with pin 9 (exposed pad). The exposed pad must be soldered to a large PCB ground for maximum power dissipation."
      },
      {
        "number": "2",
        "name": "S3",
        "type": "input",
        "description": "Active-low Suspend-to-RAM mode control pin. When low, VTT is turned off and left High-Z while VTTREF remains active. Logic thresholds: VIH ≥ 1.6V, VIL ≤ 0.4V."
      },
      {
        "number": "3",
        "name": "VTTSNS",
        "type": "input",
        "description": "VTT voltage sense input pin. Connect to the plus terminal of the VTT output capacitor for remote sensing of the VTT rail."
      },
      {
        "number": "4",
        "name": "VTTREF",
        "type": "output",
        "description": "Buffered reference output equal to VDDQSNS/2 (e.g. 1.25/0.9/0.75/0.675/0.6 V). 10mA source/sink capability; ±20mV output tolerance; source current limit typ. 40mA."
      },
      {
        "number": "5",
        "name": "VDDQSNS",
        "type": "input",
        "description": "VLDOIN (VDDQ) sense input pin. Divided internally by 2 to set the VTT and VTTREF target voltage. Input current typ. 50µA. Absolute max 3.6V."
      },
      {
        "number": "6",
        "name": "VIN",
        "type": "power_in",
        "description": "Analog input pin to the control loop. Operating range 3.15V to 5.5V; absolute max 6V. UVLO rising threshold ≤ 2.7V with 0.2V hysteresis."
      },
      {
        "number": "7",
        "name": "VLDOIN",
        "type": "power_in",
        "description": "Power supply of the VTT and VTTREF output stage (to power the internal MOSFETs). Operating range 1.2V to 3.3V; absolute max 3.6V."
      },
      {
        "number": "8",
        "name": "VTT",
        "type": "power_out",
        "description": "Output voltage for connection to termination resistors, regulated to VDDQSNS/2. Sink/source up to 3A; ±20mV tolerance under load."
      },
      {
        "number": "9",
        "name": "GND",
        "type": "power_in",
        "description": "Exposed thermal pad. Must be soldered to a large PCB ground plane for maximum power dissipation; electrically tied to pin 1 GND."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/66e6a2b33f9b9cfd28fc1368875ff6c4.pdf",
        "pages": 14,
        "sha256": "c00b245be9492010",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 9,
        "described": 9,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -1.905
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm@sha256:a7971720bdda0353",
      "mark": "drawn"
    }
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Richtek Tech",
      "Package": "SOP-8-EP",
      "Category": "PMIC",
      "Pins": "9"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "rt9026gsp"
  ],
  "discovery_pitch": "RT9026GSP (Richtek Tech) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "rt9026gsp.kicad_sym",
    "rt9026gsp.kicad_mod",
    "rt9026gsp.glb",
    "rt9026gsp.step",
    "rt9026gsp-etched.step",
    "rt9026gsp.lbr",
    "docs/hero.png",
    "docs/rt9026gsp-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "variants": [
    {
      "mpn": "RT9026GSPPSP",
      "kind": "packaging"
    },
    {
      "mpn": "RT9026GSP",
      "kind": "packaging"
    },
    {
      "mpn": "RT9026GSPPFP",
      "kind": "packaging"
    },
    {
      "mpn": "RT9026GSPGFP",
      "kind": "packaging"
    },
    {
      "mpn": "RT9026GSPPQW",
      "kind": "packaging"
    },
    {
      "mpn": "RT9026GSPGQW",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-25T05:17:49.451Z"
}