component
RT8082GQW
Public Made by Adomby adom
Richtek Tech DC-DC Converters, WDFN-12-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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| docs | 21d ago |
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| page.json | 21d ago |
| README.md | 21d ago |
| rt8082gqw-etched.glb | 21d ago |
| rt8082gqw-etched.step | 21d ago |
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RT8082GQW
Richtek Tech · DC-DC Converters · WDFN-12-EP(3x3)
RT8082GQW from Richtek Tech, in a WDFN-12-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LX | output | Internal power MOSFET switch output; connect to the inductor (pin 12 is also LX and the two must be tied together). |
| 2 | VIN | power_in | Power input; decouple to GND with two 10µF capacitors (pin 11 is also VIN). |
| 3 | PGND | power_in | Power ground; the exposed pad (pin 13) must be soldered to a large PCB and connected to ground for maximum power dissipation. |
| 4 | AGND | power_in | Analog ground providing the return path for the control circuit and internal reference. |
| 5 | BIAS | power_in | Analog power input; decouple to AGND with a minimum 0.1µF ceramic capacitor. |
| 6 | FB | input | Feedback input that sets the output voltage through an external resistive divider; feedback reference is 1V typical. |
| 7 | NC | unconnected | No internal connection. |
| 8 | EN | input | Enable control input; floating or driving logic high enables the device, and driving logic low disables it. |
| 9 | PGOOD | output | Open-drain power good indicator, pulled to ground when the output voltage is within 7% of the regulation point; requires an external pull-up. |
| 10 | PGND | power_in | Power ground, one of the PGND pins (3, 10, 13) of the device. |
| 11 | VIN | power_in | Power input; decouple to GND with two 10µF capacitors (pin 2 is also VIN). |
| 12 | LX | output | Internal power MOSFET switch output; connect to the inductor together with pin 1. |
| 13 | PGND | power_in | Exposed pad, power ground; must be soldered to a large PCB and connected to ground for maximum power dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | WDFN-12-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 13 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Input Voltage | VIN | 2.7 | 5.5 | V | 4 | ||
| Junction Temperature Range | TJ | -40 | 125 | °C | 4 | ||
| Ambient Temperature Range | TA | -40 | 85 | °C | 4 | ||
| Supply Input Voltage VIN, BIAS | VIN, BIAS | -0.3 | 6 | V | 4 | ||
| LX Pin Switch Voltage | -0.3 | 6.3 | V | 4 | |||
| LX Pin Switch Voltage | -4.5 | 7.5 | V | <20ns | 4 | ||
| Other Pins Voltage | -0.3 | 6.3 | V | 4 | |||
| LX Pin Switch Current | 5 | A | 4 | ||||
| Power Dissipation PD | PD | 1.667 | W | TA = 25°C, WDFN-12EL 3x3 | 4 | ||
| Package Thermal Resistance junction-to-ambient | θJA | 60 | °C/W | WDFN-12EL 3x3 | 4 | ||
| Package Thermal Resistance junction-to-case | θJC | 7 | °C/W | WDFN-12EL 3x3 | 4 | ||
| Junction Temperature | TJ | 150 | °C | 4 | |||
| Lead Temperature (Soldering) | 260 | °C | 10 sec soldering | 4 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 4 | ||
| ESD Susceptibility HBM | 2 | kV | HBM (Human Body Model) | 4 | |||
| Quiescent Current | IQ | 570 | 900 | µA | VFB = 0.9V, Not Switching | 4 | |
| Shutdown Current | ISHDN | 1 | 2 | µA | VEN = 0V | 4 | |
| Feedback Voltage | VFB | 0.98 | 1 | 1.02 | V | ILOAD = 100mA | 4 |
| Feedback Voltage | VFB | 0.99 | 1 | 1.01 | V | ILOAD = 100mA, TA = 25C | 4 |
| Load Regulation | 0.2 | 0.5 | % | 20mA < ILOAD < 3A | 4 | ||
| Switching Frequency | fOSC | 1.7 | 2 | 2.3 | MHz | 4 | |
| High Side Switch On-Resistance | RDS(ON)_P | 75 | 150 | mΩ | 4 | ||
| Low Side Switch On-Resistance | RDS(ON)_N | 55 | 80 | mΩ | ILX = 0.5A | 4 | |
| Peak Current Limit | ILIM | 3.5 | 5 | A | 4 | ||
| Under Voltage Lockout Threshold | VUVLO | 2.35 | 2.45 | 2.6 | V | VIN Rising | 4 |
| Power Good Resistance | 145 | 250 | Ω | IPGOOD = 500µA | 5 | ||
| Enable Threshold Voltage | 0.5 | 0.85 | 1.3 | V | EN Rising | 5 | |
| Enable Input Current | 0.1 | 2 | µA | 5 |
CAD (KiCad official)
- Symbol:
RT8082GQW - Footprint:
Package_DFN_QFN:WDFN-12-1EP_3x3mm_P0.45mm_EP1.7x2.5mm - 3D model: WDFN-12-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
rt8082gqw-etched.step/rt8082gqw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rt8082gqw.step/rt8082gqw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Richtek Tech datasheet (14 pp, sha256
407e895b9b1f6426, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).