component
RT6252BHGJ6F
Public Made by Adomby adom
Richtek Tech DC-DC Converters, TSOT-23-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C2976604). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+26−6
page.json+6−4@@ -26,7 +26,9 @@ "model_3d_step": "rt6252bhgj6f.step", "lbr": "rt6252bhgj6f.lbr" },- "distributor_links": {},+ "distributor_links": {+ "lcsc": "C2976604"+ }, "pins": [ { "number": "1",@@ -44,13 +46,13 @@ "number": "3", "name": "VIN", "type": "power_in",- "description": "Power input, 4.5V to 17V. Bypass directly to GND with an MLCC ≥ 20µF placed close to the pin."+ "description": "Power input, 4.5V to 17V. Bypass directly to GND with an MLCC \u2265 20\u00b5F placed close to the pin." }, { "number": "4", "name": "FB", "type": "input",- "description": "Feedback voltage input. Connect to the midpoint of the external resistor divider from VOUT to GND. Regulated to VFB ≈ 0.765V (±1%)."+ "description": "Feedback voltage input. Connect to the midpoint of the external resistor divider from VOUT to GND. Regulated to VFB \u2248 0.765V (\u00b11%)." }, { "number": "5",@@ -62,7 +64,7 @@ "number": "6", "name": "BOOT", "type": "power_in",- "description": "Bootstrap capacitor node for the high-side gate driver. Connect a 0.1µF ceramic capacitor from BOOT to SW."+ "description": "Bootstrap capacitor node for the high-side gate driver. Connect a 0.1\u00b5F ceramic capacitor from BOOT to SW." } ], "provenance": {
rt6252bhgj6f.lbr+20−2@@ -60,6 +60,18 @@ <smd name="4" x="1.1375" y="-0.9500" dx="1.3250" dy="0.6000" layer="1"/> <smd name="5" x="1.1375" y="-0.0000" dx="1.3250" dy="0.6000" layer="1"/> <smd name="6" x="1.1375" y="0.9500" dx="1.3250" dy="0.6000" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-1.4500" y="1.5100"/>+ <vertex x="-1.6900" y="1.8400"/>+ <vertex x="-1.2100" y="1.8400"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="-0.4000" y="1.4500"/>+ <vertex x="0.8000" y="1.4500"/>+ <vertex x="0.8000" y="-1.4500"/>+ <vertex x="-0.8000" y="-1.4500"/>+ <vertex x="-0.8000" y="1.0500"/>+ </polygon> <wire x1="-0.9100" y1="1.5600" x2="0.9100" y2="1.5600" width="0.1200" layer="21"/> <wire x1="-0.9100" y1="1.5100" x2="-0.9100" y2="1.5600" width="0.1200" layer="21"/> <wire x1="-0.9100" y1="-1.5600" x2="-0.9100" y2="-1.5100" width="0.1200" layer="21"/>@@ -68,7 +80,7 @@ <wire x1="0.9100" y1="-1.5600" x2="-0.9100" y2="-1.5600" width="0.1200" layer="21"/> <text x="0" y="2.212" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-2.212" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-1.4500" y="1.5100"/><vertex x="-1.6900" y="1.8400"/><vertex x="-1.2100" y="1.8400"/></polygon></package>+</package> </packages> <symbols> <symbol name="RT6252BHGJ6F">@@ -102,7 +114,13 @@ <connect gate="G$1" pin="EN" pad="5"/> <connect gate="G$1" pin="FB" pad="4"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="RT6252BHGJ6F" constant="no"/>+ <attribute name="MANUFACTURER" value="Richtek Tech" constant="no"/>+ <attribute name="LCSC_PN" value="C2976604" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>