component

RS60N50D

Public Made by Adom

by adom

REASUNOS MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorsrs60n50dfactory-2.0.0extractor-text

Verified RS60N50D

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier lcsc, 3 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: RS60N50D · TO-252 · 3 pins
  • ✓copper: 3 copper pads, none touching another net
  • ✓datasheet: all 3 pin names found in the 9-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: TO-252-2
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-l9dpu1yn/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.8)
  • ✓pads: 3 pins = 3 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 3 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ rs60n50d.kicad_sym✓ rs60n50d.kicad_mod✓ rs60n50d.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 2d ago
viewers rs60n50d: viewers · Ray 2d ago
package.json Publish 0.1.0 · Ray 2d ago
page.json Set visibility: public · Ray 2d ago
README.md Publish 0.1.0 · Ray 2d ago
rs60n50d-etched.glb Publish 0.1.0 · Ray 2d ago
rs60n50d-etched.step rs60n50d: factory component page (tier=lcsc) · Ray 2d ago
rs60n50d-hero.glb rs60n50d: hero GLB from the etched model (keeps the MPN mark) · Ray 2d ago
rs60n50d-hero.overlay.json Publish 0.1.0 · Ray 2d ago
rs60n50d.glb Publish 0.1.0 · Ray 2d ago
rs60n50d.kicad_mod Publish 0.1.0 · Ray 2d ago
rs60n50d.kicad_sym Publish 0.1.0 · Ray 2d ago
rs60n50d.lbr Publish 0.1.0 · Ray 2d ago
rs60n50d.step Publish 0.1.0 · Ray 2d ago
verification.json Verified: Published by the parts factory: tier lcsc, 3 pins · Ray 2d ago

RS60N50D

REASUNOS · MOSFETs · TO-252

RS60N50D from REASUNOS, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; drive with VGS limited to ±20 V, threshold 1.2 V min to 2.5 V max at ID=250 µA, RDS(on) specified at VGS=10 V and 4.5 V.
2 D passive Drain (center lead and mounting tab); VDSS 60 V, continuous 50 A at TC=25℃, pulsed 200 A.
3 S passive Source; continuous source current 50 A, pulsed 200 A through the integral body diode.

Key specifications

Parameter Value
Manufacturer REASUNOS
Package TO-252
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-to-Source Voltage VDSS 60 V 1
Continuous Drain Current ID 50 A TC=25℃ 1
Continuous Drain Current ID 35 A TC=100℃ 1
Pulsed Drain Current IDM 200 A 1
Power Dissipation PD 89 W 1
Gate-to-Source Voltage VGS -20 20 V 1
Single Pulse Avalanche Energy EAS 85 mJ L = 0.5mH,VDD = 30V, VG = 10V, Tj = 25℃ 1
Maximum Temperature for Soldering, leads at 0.063in (1.6mm) from case for 10 seconds TL 300 ℃ 1
Maximum Temperature for Soldering, package body for 10 seconds TPKG 260 ℃ 1
Operating Junction and Storage Temperature Range TJ and TSTG -55 150 ℃ 1
Junction-to-Case Thermal Resistance RθJC 1.8 ℃/W Drain lead soldered to water cooled heatsink, PD adjusted for a peak junction temperature of +150℃ 2
Junction-to-Ambient Thermal Resistance RθJA 60 ℃/W 1 cubic foot chamber, free air 2
Drain-to-Source Breakdown Voltage BVDSS 60 V VGS=0V, ID=250µA 2
Drain-to-Source Leakage Current IDSS 1 µA VDS=60V, VGS=0V 2
Gate-to-Source Forward Leakage Current IGSS 100 nA VGS=20V, VDS=0V 2
Gate-to-Source Reverse Leakage Current IGSS -100 nA VGS=-20V, VDS=0 2
Static Drain-to-Source On-Resistance RDS(on) 14 20 mΩ VGS=10V, ID=30A 2
Static Drain-to-Source On-Resistance RDS(on) 17 25 mΩ VGS=4.5V, ID=30A 2
Gate Threshold Voltage VGS(TH) 1.2 1.6 2.5 V VGS=VDS, ID=250µA 2
Continuous Source Current (integral pn-diode in MOSFET) IS 50 A 3
Maximum Pulsed Current ISM 200 A 3
Diode Forward Voltage VSD 1.2 V IS=20A, VGS=0V 3
Turn-on Delay Time td(ON) 7.4 nS VDS=30V, RL=6.7Ω, RG=3Ω, VGS=10V 2
Rise Time trise 5.1 nS VDS=30V, RL=6.7Ω, RG=3Ω, VGS=10V 2
Turn-OFF Delay Time td(OFF) 28.2 nS VDS=30V, RL=6.7Ω, RG=3Ω, VGS=10V 2
Fall Time tfall 5.5 nS VDS=30V, RL=6.7Ω, RG=3Ω, VGS=10V 2
Input Capacitance Ciss 2050 pF VGS=0V, VDS=30V, f=1.0MHz 3
Output Capacitance Coss 158 pF VGS=0V, VDS=30V, f=1.0MHz 3
Reverse Transfer Capacitance Crss 120 pF VGS=0V, VDS=30V, f=1.0MHz 3
Total Gate Charge Qg 50 nC VDS=30V, ID=20A, VGS=10V 3
Gate-to-Source Charge Qgs 6 nC VDS=30V, ID=20A, VGS=10V 3
Gate-to-Drain (Miller) Charge Qgd 15 nC VDS=30V, ID=20A, VGS=10V 3
Reverse Recovery Time trr 28 nS VGS=0V, IS=20A, di/dt=100A/µs 3
Reverse Recovery Charge Qrr 40 nC 3

CAD (KiCad official)

  • Symbol: RS60N50D
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: rs60n50d-etched.step / rs60n50d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rs60n50d.step / rs60n50d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: REASUNOS datasheet (9 pp, sha256 6db8f5f4f5b6672f, retrieved 2026-11-05, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF