# RS3E130ATTB1

**ROHM Semicon** · MOSFETs · SOP-8

RS3E130ATTB1 from ROHM Semicon, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Source | passive | MOSFET source terminal, tied internally with pins 2 and 3; body diode anode side of the P-channel device (VDSS -30V, ID ±13A). |
| 2 | Source | passive | MOSFET source terminal, tied internally with pins 1 and 3; carries continuous drain current up to ±13A for the package. |
| 3 | Source | passive | MOSFET source terminal, tied internally with pins 1 and 2; body diode continuous forward current is -1.67A. |
| 4 | Gate | input | MOSFET gate input with gate-source voltage limit of ±20V and threshold of -1.0V to -2.5V at ID = -2mA. |
| 5 | Drain | passive | MOSFET drain terminal, tied internally with pins 6, 7 and 8; VDSS -30V, RDS(on) max 8.5mΩ at VGS = -10V. |
| 6 | Drain | passive | MOSFET drain terminal, tied internally with pins 5, 7 and 8; pulsed drain current up to ±52A. |
| 7 | Drain | passive | MOSFET drain terminal, tied internally with pins 5, 6 and 8; drain-source voltage rating of -30V. |
| 8 | Drain | passive | MOSFET drain terminal, tied internally with pins 5, 6 and 7; power dissipation 2.0W on a ceramic board. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | ROHM Semicon |
| Package | SOP-8 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source voltage | VDSS |  |  | -30 | V | Ta = 25°C | 1 |
| Continuous drain current | ID | -13 |  | 13 | A | Ta = 25°C | 1 |
| Pulsed drain current | IDP | -52 |  | 52 | A | Pw ≤ 10μs, Duty cycle ≤ 1% | 1 |
| Gate-Source voltage | VGSS | -20 |  | 20 | V | Ta = 25°C | 1 |
| Avalanche current, single pulse | IAS |  |  | -13 | A | L ≃ 0.5mH, VDD = -15V, RG = 25Ω, Starting Tj = 25℃ | 1 |
| Avalanche energy, single pulse | EAS |  |  | 42 | mJ | L ≃ 0.5mH, VDD = -15V, RG = 25Ω, Starting Tj = 25℃ | 1 |
| Power dissipation (ceramic board) | PD |  |  | 2 | W | Mounted on a ceramic board (30×30×0.8mm) | 1 |
| Power dissipation (Cu board) | PD |  |  | 1.4 | W | Mounted on a Cu board (40×40×0.8mm) | 1 |
| Junction temperature | Tj |  |  | 150 | ℃ |  | 1 |
| Operating junction and storage temperature range | Tstg | -55 |  | 150 | ℃ |  | 1 |
| Thermal resistance, junction-ambient (ceramic board) | RthJA |  |  | 62.5 | ℃/W | Mounted on a ceramic board (30×30×0.8mm) | 2 |
| Thermal resistance, junction-ambient (Cu board) | RthJA |  |  | 89.2 | ℃/W | Mounted on a Cu board (40×40×0.8mm) | 2 |
| Drain-Source breakdown voltage | V(BR)DSS | -30 |  |  | V | VGS = 0V, ID = -1mA | 2 |
| Breakdown voltage temperature coefficient | ΔV(BR)DSS/ΔTj |  | -22 |  | mV/℃ | ID = -1mA referenced to 25℃ | 2 |
| Zero gate voltage drain current | IDSS |  |  | -1 | μA | VDS = -30V, VGS = 0V | 2 |
| Gate-Source leakage current | IGSS | -500 |  | 500 | nA | VGS = ±20V, VDS = 0V | 2 |
| Gate threshold voltage | VGS(th) | -1 |  | -2.5 | V | VDS = VGS, ID = -2mA | 2 |
| Gate threshold voltage temperature coefficient | ΔVGS(th)/ΔTj |  | 2.9 |  | mV/℃ | ID = -1mA referenced to 25℃ | 2 |
| Static drain-source on-state resistance | RDS(on) |  | 6.5 | 8.5 | mΩ | VGS = -10V, ID = -13A, pulsed | 2 |
| Static drain-source on-state resistance | RDS(on) |  | 8.6 | 11.2 | mΩ | VGS = -4.5V, ID = -13A, pulsed | 2 |
| Gate resistance | RG |  | 6 |  | Ω | f = 1MHz, open drain | 2 |
| Forward transfer admittance | /Yfs/ | 21 |  |  | S | VDS = -5V, ID = -13A, pulsed | 2 |
| Input capacitance | Ciss |  | 3730 |  | pF | VGS = 0V, VDS = -15V, f = 1MHz | 3 |
| Output capacitance | Coss |  | 680 |  | pF | VGS = 0V, VDS = -15V, f = 1MHz | 3 |
| Reverse transfer capacitance | Crss |  | 530 |  | pF | VGS = 0V, VDS = -15V, f = 1MHz | 3 |
| Turn-on delay time | td(on) |  | 17 |  | ns | VDD ≃ -15V, VGS = -10V, ID = -6.5A, RL ≃ 2.3Ω, RG = 10Ω | 3 |
| Rise time | tr |  | 25 |  | ns | VDD ≃ -15V, VGS = -10V, ID = -6.5A, RL ≃ 2.3Ω, RG = 10Ω | 3 |
| Turn-off delay time | td(off) |  | 200 |  | ns | VDD ≃ -15V, VGS = -10V, ID = -6.5A, RL ≃ 2.3Ω, RG = 10Ω | 3 |
| Fall time | tf |  | 165 |  | ns | VDD ≃ -15V, VGS = -10V, ID = -6.5A, RL ≃ 2.3Ω, RG = 10Ω | 3 |
| Total gate charge | Qg |  | 83 |  | nC | VDD ≃ -15V, ID = -13A, VGS = -10V | 3 |
| Total gate charge | Qg |  | 42 |  | nC | VDD ≃ -15V, ID = -13A, VGS = -4.5V | 3 |
| Gate-Source charge | Qgs |  | 12.6 |  | nC | VDD ≃ -15V, ID = -13A | 3 |
| Gate-Drain charge | Qgd |  | 15.7 |  | nC | VDD ≃ -15V, ID = -13A | 3 |
| Body diode continuous forward current | IS |  |  | -1.67 | A | Ta = 25℃ | 3 |
| Body diode pulse forward current | ISP |  |  | -52 | A | Pw ≤ 10μs, Duty cycle ≤ 1% | 3 |
| Body diode forward voltage | VSD |  |  | -1.2 | V | VGS = 0V, IS = -1.67A, pulsed | 3 |

## CAD (KiCad official)

- Symbol: `RS3E130ATTB1`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `rs3e130attb1-etched.step` / `rs3e130attb1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `rs3e130attb1.step` / `rs3e130attb1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [ROHM Semicon datasheet](docs/rs3e130attb1-datasheet.pdf) (14 pp, sha256 `09c3023afc20d04c`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/rs3e130attb1-datasheet.pdf)