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RF430FRL154HCRGER

Texas Instruments · RFID ICs · VQFN-24-EP(4x4)

RF430FRL154HCRGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ANT1 input Antenna input 1 for the 13.56-MHz RF front end; antenna voltage up to 3.6 V.
2 ANT2 input Antenna input 2 for the 13.56-MHz RF front end; antenna voltage up to 3.6 V.
3 VDDSW passive Switched supply voltage; recommended 2.2 µF low-ESR capacitor.
4 VDDB power_in Battery supply voltage, 1.45 V to 1.65 V recommended (absolute max 1.65 V), with a 100 nF capacitor.
5 CP1 passive Charge pump flying capacitor terminal 1; 10 nF CFLY recommended between CP1 and CP2.
6 CP2 passive Charge pump flying capacitor terminal 2; 10 nF CFLY recommended between CP1 and CP2.
7 VDD2X power_out Voltage doubler output; 100 nF capacitor recommended.
8 P1.3/SPI_STE/TA0.2/ACLK/TA0CLK bidirectional General-purpose digital I/O multiplexed with SPI slave transmit enable, Timer_A TA0.2 output, ACLK output and TA0CLK input.
9 P1.2/SPI_CLK/MCLK/TA0.0 bidirectional General-purpose digital I/O multiplexed with SPI clock, MCLK output and Timer_A TA0.0 output.
10 RST/NMI input Active-low reset input or non-maskable interrupt input; if unused tie to VCC or VSS with a 10-nF capacitor to GND.
11 P1.1/SPI_SOMI/SCL/ACLK/TA0.2/CCI0.0 bidirectional General-purpose digital I/O multiplexed with SPI SOMI, I2C clock, ACLK output, Timer_A TA0.2 output and CCI0.0 capture input.
12 P1.0/SPI_SIMO/SDA/SMCLK/TA0.1/CCI0.0 bidirectional General-purpose digital I/O multiplexed with SPI SIMO, I2C data, SMCLK output, Timer_A TA0.1 output and CCI0.0 capture input.
13 ADC0 input ADC input pin 0; low-leakage pin with reduced ESD tolerance of ±500 V HBM.
14 TST2 passive Internal test pin; connect to GND.
15 SVSS passive Sensor reference potential; 1 µF capacitor to VSS recommended.
16 TST1 passive Internal test pin; connect to GND.
17 ADC1/TEMP1 input ADC input pin 1 / resistive bias pin 1.
18 ADC2/TEMP2 input ADC input pin 2 / resistive bias pin 2.
19 TMS/P1.7/TA0.1/TA0.0/CCI0.2 bidirectional JTAG test mode select, or general-purpose digital I/O multiplexed with Timer_A TA0.1/TA0.0 outputs and CCI0.2 capture input.
20 TDO/P1.6/TA0.0/TA0.2/CCI0.2 bidirectional JTAG test data output, or general-purpose digital I/O multiplexed with Timer_A TA0.0/TA0.2 outputs and CCI0.2 capture input.
21 TDI/P1.5/TA0.2/MCLK/CCI0.1 bidirectional JTAG test data input, or general-purpose digital I/O multiplexed with Timer_A TA0.2 output, MCLK output and CCI0.1 capture input.
22 TCK/P1.4/TA0.1/SMCLK/CCI0.1 bidirectional JTAG test clock, or general-purpose digital I/O multiplexed with Timer_A TA0.1 output, SMCLK output, CCI0.1 capture input and external clock input CLKIN.
23 VDDH power_out Rectified voltage from the RF analog front end.
24 VDDD power_out Digital supply voltage; 1 µF capacitor recommended.
25 VSS power_in Ground reference (combined digital and analog ground), bonded to the exposed pad.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24-EP(4x4)
Category RF And Wireless
Pins 25

CAD (KiCad official)

  • Symbol: RF430FRL154HCRGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: rf430frl154hcrger-etched.step / rf430frl154hcrger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rf430frl154hcrger.step / rf430frl154hcrger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (54 pp, sha256 4eca093bb4976829, retrieved 2026-10-06, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF