component
ref5040aidr
Public Made by Adomby adom
Texas Instruments Voltage Reference, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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README
markdownREF5040AIDR
Texas Instruments · Voltage Reference · SOIC-8
REF5040AIDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DNC | unconnected | Do Not Connect. This pin is used internally by the factory; it must be left floating in the application. Do not tie to ground, supply, or any other net. |
| 2 | VIN | power_in | Positive supply input. Operating range is (VOUT + 0.2 V) up to +18 V (minimum 2.7 V for VOUT ≤ 2.5 V). Bypass with 1 µF to 10 µF to GND close to the pin. |
| 3 | TEMP | output | Temperature-proportional voltage output. VTEMP ≈ 509 mV + 2.64 mV/°C · T(°C) with ~60 kΩ source impedance. Buffer with a low-drift op-amp (e.g. OPA333/335/376) before driving any load; loading directly introduces measurement error but does not affect VOUT. |
| 4 | GND | power_in | Device ground / 0 V reference. All voltages (VIN, VOUT, TRIM/NR, TEMP) are referred to this pin. |
| 5 | TRIM/NR | bidirectional | Trim and noise-reduction pin - provides access to the internal bandgap node. Connect a 1 µF (or larger) capacitor to GND to form a low-pass filter with the internal 60 kΩ/… resistor network (fc ≈ 10-20 Hz), halving output noise. Alternatively, drive with an external resistor network to trim VOUT by ±15 mV. Leave floating if unused. |
| 6 | VOUT | output | Precision reference voltage output - 4.096 V nominal for REF5040. Load capacitor CL = 1 µF to 50 µF to GND required for stability; ESR of CL must be ≤ 1.5 Ω (recommended 1-1.5 Ω for lowest noise). Can source and sink up to ±10 mA. |
| 7 | DNC | unconnected | Do Not Connect. Factory-use pin; must be left floating. Do not tie to ground, supply, or any other net. |
| 8 | NC | unconnected | No Internal Connection. This pin has no bond to the die and may be left floating or tied to any convenient net (though best practice is to leave it open). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
REF5040AIDRREF5040AIDRAIDTREF5040AIDRIDTREF5040AIDRAIDGKREF5040AIDRAIDGKRREF5040AIDRIDGKREF5040AIDRIDGKR
CAD (KiCad official)
- Symbol:
REF5040AIDR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ref5040aidr-etched.step/ref5040aidr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ref5040aidr.step/ref5040aidr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (None pp, sha256
3a122a4697547349, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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