# RC25P03S

**RealChip(正芯半导体)** · MOSFETs · SOP-8

RC25P03S from RealChip(正芯半导体), in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET, tied with pins 2 and 3. |
| 2 | S | passive | Source of the P-channel MOSFET, tied with pins 1 and 3. |
| 3 | S | passive | Source of the P-channel MOSFET, tied with pins 1 and 2. |
| 4 | G | input | Gate of the P-channel MOSFET, with a maximum gate-source voltage of ±20 V. |
| 5 | D | passive | Drain of the P-channel MOSFET, tied with pins 6, 7 and 8; VDS is rated at -30 V. |
| 6 | D | passive | Drain of the P-channel MOSFET, tied with pins 5, 7 and 8; continuous ID is -25 A at TA=25°C. |
| 7 | D | passive | Drain of the P-channel MOSFET, tied with pins 5, 6 and 8. |
| 8 | D | passive | Drain of the P-channel MOSFET, tied with pins 5, 6 and 7. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | RealChip(正芯半导体) |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source voltage | VDS | -30 |  |  | V |  | 1 |
| Gate-Source voltage | VGS | -20 |  | 20 | V |  | 1 |
| Continuous Drain Current | ID | -25 |  |  | A | TA=25°C | 1 |
| Continuous Drain Current | ID | -8.8 |  |  | A | TA=100°C | 1 |
| Pulsed Drain Current | IDM | -60 |  |  | A |  | 1 |
| Single Pulse Avalanche Energy | EAS |  |  | 80 | mJ |  | 1 |
| Total Power Dissipation | PD |  |  | 3 | W | TA=25°C | 1 |
| Operating Junction and Storage Temperature Range | TJ, TSTG | -55 |  | 150 | °C |  | 1 |
| Thermal Resistance from Junction-to-Ambient | RθJA |  | 41.6 |  | °C/W |  | 1 |
| Drain-Source Breakdown Voltage | V(BR)DSS | -30 |  |  | V | VGS = 0V, ID = -250µA | 2 |
| Gate-body Leakage current | IGSS | -100 |  | 100 | nA | VDS = 0V, VGS = ±20V | 2 |
| Zero Gate Voltage Drain Current (TJ=25°C) | IDSS |  |  | -1 | µA | TJ=25°C, VDS = -30V, VGS = 0V | 2 |
| Zero Gate Voltage Drain Current (TJ=100°C) | IDSS |  |  | -100 | µA | TJ=100°C, VDS = -30V, VGS = 0V | 2 |
| Gate-Threshold Voltage | VGS(th) | -1 |  | -2.5 | V | VDS = VGS, ID = -250µA | 2 |
| Drain-Source On-Resistance (VGS = -10V) | RDS(on) |  | 5.8 | 9.2 | mΩ | VGS = -10V, ID = -12A | 2 |
| Drain-Source On-Resistance (VGS = -4.5V) | RDS(on) |  | 8 | 14 | mΩ | VGS = -4.5V, ID = -10A | 2 |
| Diode Forward Voltage | VSD |  |  | -1.2 | V | IS = -1A, VGS = 0V | 2 |
| Continuous Source Current | IS |  |  | -14 | A | TA=25°C | 2 |

## CAD (KiCad official)

- Symbol: `RC25P03S`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `rc25p03s-etched.step` / `rc25p03s-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `rc25p03s.step` / `rc25p03s.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [RealChip(正芯半导体) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603166791930044416) (6 pp, sha256 `53323f025b7875b3`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/rc25p03s-datasheet.pdf)