component
QCPL-074H-500E
Public Made by Adomby adom
Broadcom AVAGO Transistor, Photovoltaic Output Optoisolators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"component": {
"mpn": "QCPL-074H-500E",
"manufacturer": "Broadcom AVAGO",
"package": "SOP-8",
"pin_count": 8,
"category": "Optoisolators",
"subcategory": "Transistor, Photovoltaic Output Optoisolators",
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"pins": [
{
"number": "1",
"name": "ANODE1",
"type": "input",
"description": "LED anode for channel 1; a series limiting resistor of 80 ohm at 3.3 V or 210 ohm at 5 V is recommended, with input ON current 9 to 18 mA."
},
{
"number": "2",
"name": "CATHODE1",
"type": "passive",
"description": "LED cathode for channel 1 of the dual-channel optocoupler."
},
{
"number": "3",
"name": "CATHODE2",
"type": "passive",
"description": "LED cathode for channel 2 of the dual-channel optocoupler."
},
{
"number": "4",
"name": "ANODE2",
"type": "input",
"description": "LED anode for channel 2; a series limiting resistor of 80 ohm at 3.3 V or 210 ohm at 5 V is recommended, with input ON current 9 to 18 mA."
},
{
"number": "5",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the output stages and the detector ICs; a 0.1 uF bypass capacitor must be connected between pins 5 and 8."
},
{
"number": "6",
"name": "VO2",
"type": "output",
"description": "CMOS logic output of channel 2 (logic high when the LED is off, logic low when on), with 0.01 uF to 0.1 uF bypass recommended across VDD and GND."
},
{
"number": "7",
"name": "VO1",
"type": "output",
"description": "CMOS logic output of channel 1 (logic high when the LED is off, logic low when on)."
},
{
"number": "8",
"name": "VDD",
"type": "power_in",
"description": "Supply voltage: 4.5 V to 5.5 V or 3.0 V to 3.6 V, with a minimum of 3.0 V required before powering up the output-connected component."
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"extractor": "extract_pins 0.3",
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"guards": "pin_guards 0.1: passed",
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"extractor flagged: The datasheet's QCPL-074H pin-name listing on page 1 is a scrambled text dump and does not map clean; Figure 7 for QCPL-074H labels two pins as GND 1 and GND 2 while the pinout listing shows a single GN; The SHIELD on the internal isolation barrier is shown in the drawing but has no pin number in the da",
"2/8 pins cited to the wrong page (name found elsewhere): ['1:ANODE1@p9', '4:ANODE2@p9']"
],
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"at": "2026-10-18T06:25:17"
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"sha256": "87574500a3d7b62a",
"source_tier": "lcsc"
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"cad": "KiCad official (CC-BY-SA 4.0)",
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"total": 8,
"described": 8,
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"refuses_to_fabricate": true
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