component
Q4040J7TP
Public Made by Adomby adom
Littelfuse Thyristors (SCR)/Modules, TO-218-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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Q4040J7TP
Littelfuse · Thyristors (SCR)/Modules · TO-218-3
Q4040J7TP from Littelfuse, in a TO-218-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MT1 | passive | Main terminal 1, to which all device voltages and gate-trigger polarities are referenced (Figure 1); the datasheet gives no separate pin-number marking for this terminal. |
| 2 | MT2 | passive | Main terminal 2, the bidirectional switched terminal; the device is rated for VDRM/VRRM of 400 V for this 400 V variant and IT(RMS) of 40 A at TC = 75 °C. |
| 3 | Gate | input | Gate trigger input for Qxx40J7 (100 mA max IGT in quadrants I-III, 2.0 V max VGT at VD = 12 V); peak gate current is limited to 4 A (tp = 20 µs, TJ = 125 °C) and average gate power to 0.5 W. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Littelfuse |
| Package | TO-218-3 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate trigger current (I-II-III) | IGT | 100 | mA | VD = 12V, RL = 60 Ω, I, II, III | 2 | ||
| Gate trigger voltage (ALL quadrants) | VGT | 2 | V | VD = 12V, RL = 60 Ω, I, II, III | 2 | ||
| Gate non-trigger voltage | VGD | 0.2 | V | VD = VDRM, RL = 3.3 kΩ, TJ = 125°C, I, II, III | 2 | ||
| Holding current | IH | 100 | mA | IT = 400mA | 2 | ||
| Critical rate of rise of off-state voltage (400V) | dv/dt | 700 | V/μs | VD = VDRM, Gate Open, TJ = 125°C, 400V | 2 | ||
| Critical rate of rise of off-state voltage at commutation | (dv/dt)c | 50 | V/µs | (di/dt)c = 21.6 A/ms, TJ = 125°C | 2 | ||
| On-state voltage | VTM | 1.8 | V | ITM = 56.6A, tp = 380 µs, TJ = 25°C | 3 | ||
| Peak off-state current | IDRM | 20 | µA | VD = VDRM / VRRM, TJ = 25°C, 400-1000V | 3 | ||
| Peak off-state current | IDRM | 5 | mA | VD = VDRM / VRRM, TJ = 125°C, 400-800V | 3 | ||
| RMS on-state current (full sine wave) | IT(RMS) | 40 | A | TC = 75 °C | 2 | ||
| Peak non-repetitive surge on-state current | ITSM | 335 | A | Full cycle, TJ initial = 25°C; f = 50 Hz, t = 20 ms | 2 | ||
| Peak non-repetitive surge on-state current | ITSM | 400 | A | Full cycle, TJ initial = 25°C; f = 60 Hz, t = 16.7 ms | 2 | ||
| I2t value for fusing | I2t | 664 | A2s | tp = 8.3 ms | 2 | ||
| Critical rate of rise of on-state current | di/dt | 150 | A/µs | f = 120 Hz; TJ = 125 °C; IG = 2 x IGT, tr ≤ 100 ns | 2 | ||
| Peak gate trigger current | IGTM | 4 | A | tp = 20 µs; TJ = 125 °C | 2 | ||
| Average gate power dissipation | PG(AV) | 0.5 | W | TJ = 125 °C | 2 | ||
| Storage temperature range | Tstg | -40 | 150 | °C | 2 | ||
| Operating junction temperature range | TJ | -40 | 125 | °C | 2 | ||
| Thermal resistance, junction to case (AC) | RθJ-C | 0.95 | °C/W | Junction to case (AC), Qxx40J7 | 3 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Lead Bend MIL-STD-750, M-2036 Cond E Terminal Finish 100% Matte Tin-plated. | 6 |
CAD (KiCad official)
- Symbol:
Q4040J7TP - Footprint:
Package_TO_SOT_THT:TO-218-3_Vertical - 3D model: TO-218-3 (KiCad packages3D, STEP)
- 3D model files:
q4040j7tp-etched.step/q4040j7tp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);q4040j7tp.step/q4040j7tp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Littelfuse datasheet (8 pp, sha256
bc762ef3ea031978, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# Q4040J7TP
**Littelfuse** · Thyristors (SCR)/Modules · TO-218-3
Q4040J7TP from Littelfuse, in a TO-218-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MT1 | passive | Main terminal 1, to which all device voltages and gate-trigger polarities are referenced (Figure 1); the datasheet gives no separate pin-number marking for this terminal. |
| 2 | MT2 | passive | Main terminal 2, the bidirectional switched terminal; the device is rated for VDRM/VRRM of 400 V for this 400 V variant and IT(RMS) of 40 A at TC = 75 °C. |
| 3 | Gate | input | Gate trigger input for Qxx40J7 (100 mA max IGT in quadrants I-III, 2.0 V max VGT at VD = 12 V); peak gate current is limited to 4 A (tp = 20 µs, TJ = 125 °C) and average gate power to 0.5 W. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Littelfuse |
| Package | TO-218-3 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate trigger current (I-II-III) | IGT | | | 100 | mA | VD = 12V, RL = 60 Ω, I, II, III | 2 |
| Gate trigger voltage (ALL quadrants) | VGT | | | 2 | V | VD = 12V, RL = 60 Ω, I, II, III | 2 |
| Gate non-trigger voltage | VGD | 0.2 | | | V | VD = VDRM, RL = 3.3 kΩ, TJ = 125°C, I, II, III | 2 |
| Holding current | IH | | | 100 | mA | IT = 400mA | 2 |
| Critical rate of rise of off-state voltage (400V) | dv/dt | 700 | | | V/μs | VD = VDRM, Gate Open, TJ = 125°C, 400V | 2 |
| Critical rate of rise of off-state voltage at commutation | (dv/dt)c | 50 | | | V/µs | (di/dt)c = 21.6 A/ms, TJ = 125°C | 2 |
| On-state voltage | VTM | | | 1.8 | V | ITM = 56.6A, tp = 380 µs, TJ = 25°C | 3 |
| Peak off-state current | IDRM | | | 20 | µA | VD = VDRM / VRRM, TJ = 25°C, 400-1000V | 3 |
| Peak off-state current | IDRM | | | 5 | mA | VD = VDRM / VRRM, TJ = 125°C, 400-800V | 3 |
| RMS on-state current (full sine wave) | IT(RMS) | | | 40 | A | TC = 75 °C | 2 |
| Peak non-repetitive surge on-state current | ITSM | | | 335 | A | Full cycle, TJ initial = 25°C; f = 50 Hz, t = 20 ms | 2 |
| Peak non-repetitive surge on-state current | ITSM | | | 400 | A | Full cycle, TJ initial = 25°C; f = 60 Hz, t = 16.7 ms | 2 |
| I2t value for fusing | I2t | | | 664 | A2s | tp = 8.3 ms | 2 |
| Critical rate of rise of on-state current | di/dt | | | 150 | A/µs | f = 120 Hz; TJ = 125 °C; IG = 2 x IGT, tr ≤ 100 ns | 2 |
| Peak gate trigger current | IGTM | | | 4 | A | tp = 20 µs; TJ = 125 °C | 2 |
| Average gate power dissipation | PG(AV) | | | 0.5 | W | TJ = 125 °C | 2 |
| Storage temperature range | Tstg | -40 | | 150 | °C | | 2 |
| Operating junction temperature range | TJ | -40 | | 125 | °C | | 2 |
| Thermal resistance, junction to case (AC) | RθJ-C | | 0.95 | | °C/W | Junction to case (AC), Qxx40J7 | 3 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | Lead Bend MIL-STD-750, M-2036 Cond E Terminal Finish 100% Matte Tin-plated. | 6 |
## CAD (KiCad official)
- Symbol: `Q4040J7TP`
- Footprint: `Package_TO_SOT_THT:TO-218-3_Vertical`
- 3D model: TO-218-3 (KiCad packages3D, STEP)
- 3D model files: `q4040j7tp-etched.step` / `q4040j7tp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `q4040j7tp.step` / `q4040j7tp.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Littelfuse datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602598405625421824) (8 pp, sha256 `bc762ef3ea031978`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/q4040j7tp-datasheet.pdf)