component
PUMB11
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Nexperia Digital Transistors, SOT-363. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PUMB11
Nexperia · Digital Transistors · SOT-363
PUMB11 from Nexperia, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND1 | power_in | Ground (emitter) terminal of TR1, the first PNP transistor with built-in 10 kΩ bias resistors (Table 2). |
| 2 | I1 | input | Input (base) of TR1; the input voltage is rated from -40 V (negative) to 10 V (positive) per Table 5. |
| 3 | O2 | output | Output (collector) of TR2; collector-emitter voltage is limited to -50 V (open base) and output current to -100 mA per Table 5. |
| 4 | GND2 | power_in | Ground (emitter) terminal of TR2, the second PNP transistor with built-in 10 kΩ bias resistors (Table 2). |
| 5 | I2 | input | Input (base) of TR2; the input voltage is rated from -40 V (negative) to 10 V (positive) per Table 5. |
| 6 | O1 | output | Output (collector) of TR1; collector-emitter voltage is limited to -50 V (open base) and output current to -100 mA per Table 5. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-363 |
| Category | Transistors/Thyristors |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Collector-base voltage | VCBO | -50 | V | open emitter | 3 | ||
| Collector-emitter voltage | VCEO | -50 | V | open base | 3 | ||
| Emitter-base voltage | VEBO | -10 | V | open collector | 3 | ||
| Input voltage (positive) | VI | 10 | V | positive | 3 | ||
| Input voltage (negative) | VI | -40 | V | negative | 3 | ||
| Output current | IO | -100 | mA | 3 | |||
| Total power dissipation, per transistor | Ptot | 200 | mW | Tamb ≤ 25 °C | 3 | ||
| Total power dissipation, per device | Ptot | 300 | mW | Tamb = 25 °C | 3 | ||
| Junction temperature | Tj | 150 | °C | 3 | |||
| Ambient temperature | Tamb | -65 | 150 | °C | 3 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Thermal resistance junction to ambient, per transistor | Rth(j-a) | 625 | K/W | in free air | 4 | ||
| Thermal resistance junction to ambient, per device | Rth(j-a) | 417 | K/W | in free air | 4 | ||
| Collector-base breakdown voltage | V(BR)CBO | -50 | V | IC = -100 µA; IE = 0 A | 5 | ||
| Collector-emitter breakdown voltage | V(BR)CEO | -50 | V | IC = -2 mA; IB = 0 A | 5 | ||
| Collector-base cut-off current | ICBO | -100 | nA | VCB = -50 V; IE = 0 A | 5 | ||
| Collector-emitter cut-off current | ICEO | -1 | µA | VCE = -30 V; IB = 0 A | 5 | ||
| Collector-emitter cut-off current at high temperature | ICEO | -5 | µA | VCE = -30 V; IB = 0 A; Tj = 150 °C | 5 | ||
| Emitter-base cut-off current | IEBO | -400 | µA | VEB = -5 V; IC = 0 A | 5 | ||
| DC current gain | hFE | -30 | VCE = -5 V; IC = -5 mA | 5 | |||
| Collector-emitter saturation voltage | VCEsat | -100 | mV | IC = -10 mA; IB = -0.5 mA | 5 | ||
| Off-state input voltage | VI(off) | -1.1 | -0.8 | V | VCE = -5 V; IC = -100 µA | 5 | |
| On-state input voltage | VI(on) | -2.5 | -1.8 | V | VCE = -0.3 V; IC = -10 mA | 5 | |
| Bias resistor 1 (input) | R1 | 7 | 10 | 13 | kΩ | 5 | |
| Bias resistor ratio | R2/R1 | 0.8 | 1 | 1.2 | 5 | ||
| Collector capacitance | Cc | 3 | pF | VCB = -10 V; IE = 0 A; ie = 0 A; f = 1 MHz | 5 |
CAD (KiCad official)
- Symbol:
PUMB11 - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files:
pumb11-etched.step/pumb11-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pumb11.step/pumb11.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (11 pp, sha256
05a59db08fbac5fa, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PUMB11
**Nexperia** · Digital Transistors · SOT-363
PUMB11 from Nexperia, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND1 | power_in | Ground (emitter) terminal of TR1, the first PNP transistor with built-in 10 kΩ bias resistors (Table 2). |
| 2 | I1 | input | Input (base) of TR1; the input voltage is rated from -40 V (negative) to 10 V (positive) per Table 5. |
| 3 | O2 | output | Output (collector) of TR2; collector-emitter voltage is limited to -50 V (open base) and output current to -100 mA per Table 5. |
| 4 | GND2 | power_in | Ground (emitter) terminal of TR2, the second PNP transistor with built-in 10 kΩ bias resistors (Table 2). |
| 5 | I2 | input | Input (base) of TR2; the input voltage is rated from -40 V (negative) to 10 V (positive) per Table 5. |
| 6 | O1 | output | Output (collector) of TR1; collector-emitter voltage is limited to -50 V (open base) and output current to -100 mA per Table 5. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-363 |
| Category | Transistors/Thyristors |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Collector-base voltage | VCBO | | | -50 | V | open emitter | 3 |
| Collector-emitter voltage | VCEO | | | -50 | V | open base | 3 |
| Emitter-base voltage | VEBO | | | -10 | V | open collector | 3 |
| Input voltage (positive) | VI | | | 10 | V | positive | 3 |
| Input voltage (negative) | VI | | | -40 | V | negative | 3 |
| Output current | IO | | | -100 | mA | | 3 |
| Total power dissipation, per transistor | Ptot | | | 200 | mW | Tamb ≤ 25 °C | 3 |
| Total power dissipation, per device | Ptot | | | 300 | mW | Tamb = 25 °C | 3 |
| Junction temperature | Tj | | | 150 | °C | | 3 |
| Ambient temperature | Tamb | -65 | | 150 | °C | | 3 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 3 |
| Thermal resistance junction to ambient, per transistor | Rth(j-a) | | | 625 | K/W | in free air | 4 |
| Thermal resistance junction to ambient, per device | Rth(j-a) | | | 417 | K/W | in free air | 4 |
| Collector-base breakdown voltage | V(BR)CBO | -50 | | | V | IC = -100 µA; IE = 0 A | 5 |
| Collector-emitter breakdown voltage | V(BR)CEO | -50 | | | V | IC = -2 mA; IB = 0 A | 5 |
| Collector-base cut-off current | ICBO | | | -100 | nA | VCB = -50 V; IE = 0 A | 5 |
| Collector-emitter cut-off current | ICEO | | | -1 | µA | VCE = -30 V; IB = 0 A | 5 |
| Collector-emitter cut-off current at high temperature | ICEO | | | -5 | µA | VCE = -30 V; IB = 0 A; Tj = 150 °C | 5 |
| Emitter-base cut-off current | IEBO | | | -400 | µA | VEB = -5 V; IC = 0 A | 5 |
| DC current gain | hFE | -30 | | | | VCE = -5 V; IC = -5 mA | 5 |
| Collector-emitter saturation voltage | VCEsat | | | -100 | mV | IC = -10 mA; IB = -0.5 mA | 5 |
| Off-state input voltage | VI(off) | | -1.1 | -0.8 | V | VCE = -5 V; IC = -100 µA | 5 |
| On-state input voltage | VI(on) | -2.5 | -1.8 | | V | VCE = -0.3 V; IC = -10 mA | 5 |
| Bias resistor 1 (input) | R1 | 7 | 10 | 13 | kΩ | | 5 |
| Bias resistor ratio | R2/R1 | 0.8 | 1 | 1.2 | | | 5 |
| Collector capacitance | Cc | | | 3 | pF | VCB = -10 V; IE = 0 A; ie = 0 A; f = 1 MHz | 5 |
## CAD (KiCad official)
- Symbol: `PUMB11`
- Footprint: `Package_TO_SOT_SMD:SOT-363_SC-70-6`
- 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files: `pumb11-etched.step` / `pumb11-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pumb11.step` / `pumb11.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nexperia datasheet](https://assets.nexperia.com/documents/data-sheet/PUMB11.pdf) (11 pp, sha256 `05a59db08fbac5fa`, retrieved 2026-10-18, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pumb11-datasheet.pdf)