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PMV60ENEAR
Public Made by Adomby adom
Nexperia MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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pmv60enear: specified limits as data (metadata.characteristics, 29 rows from the datasheet)
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PMV60ENEAR
Nexperia · MOSFETs · SOT-23
PMV60ENEAR from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate of the N-channel enhancement-mode MOSFET; the datasheet limits gate-source voltage VGS to -20 V to 20 V (Table 5). |
| 2 | S | passive | Source of the N-channel MOSFET; the datasheet gives a source current limit of 1.3 A at Tamb = 25 °C (Table 5). |
| 3 | D | passive | Drain of the N-channel MOSFET; the datasheet gives a drain-source voltage limit of 40 V and a continuous drain current of 3 A at Tamb = 25 °C with VGS = 10 V (Table 5). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| drain-source voltage | VDS | 40 | V | 3 | |||
| gate-source voltage | VGS | -20 | 20 | V | Tj = 25 °C | 3 | |
| drain current | ID | 3 | A | VGS = 10 V; Tamb = 25 °C [1] | 3 | ||
| drain current | ID | 2.1 | A | VGS = 10 V; Tamb = 100 °C [1] | 3 | ||
| peak drain current | IDM | 12 | A | Tamb = 25 °C; single pulse; tp ≤ 10 µs | 3 | ||
| total power dissipation | Ptot | 615 | mW | Tamb = 25 °C [2] | 3 | ||
| total power dissipation | Ptot | 1.25 | W | [1] | 3 | ||
| total power dissipation | Ptot | 7.5 | W | Tsp = 25 °C | 3 | ||
| junction temperature | Tj | -55 | 175 | °C | 3 | ||
| ambient temperature | Tamb | -55 | 175 | °C | 3 | ||
| storage temperature | Tstg | -65 | 175 | °C | 3 | ||
| source current | IS | 1.3 | A | Tamb = 25 °C [1] | 3 | ||
| electrostatic discharge voltage | VESD | 1500 | V | HBM [3]; measured between all pins | 3 | ||
| non-repetitive drain-source avalanche energy | EDS(AL)S | 8.5 | mJ | Tj(init) = 25 °C; ID = 0.42 A; DUT in avalanche (unclamped) | 3 | ||
| thermal resistance from junction to ambient | Rth(j-a) | 212 | 244 | K/W | in free air; [1] FR4 PCB, single-sided copper, standard footprint | 5 | |
| thermal resistance from junction to ambient | Rth(j-a) | 104 | 119 | K/W | in free air; [2] FR4 PCB, mounting pad for drain 6 cm2 | 5 | |
| thermal resistance from junction to solder point | Rth(j-sp) | 17 | 20 | K/W | 5 | ||
| drain-source breakdown voltage | V(BR)DSS | 40 | V | ID = 250 µA; VGS = 0 V; Tj = 25 °C | 6 | ||
| gate-source threshold voltage | VGSth | 1 | 1.6 | 2.5 | V | ID = 250 µA; VDS = VGS; Tj = 25 °C | 6 |
| drain leakage current | IDSS | 1 | µA | VDS = 40 V; VGS = 0 V; Tj = 25 °C | 6 | ||
| gate leakage current | IGSS | 10 | µA | VGS = 20 V; VDS = 0 V; Tj = 25 °C | 6 | ||
| gate leakage current | IGSS | -10 | µA | VGS = -20 V; VDS = 0 V; Tj = 25 °C | 6 | ||
| gate leakage current | IGSS | 2 | µA | VGS = 10 V; VDS = 0 V; Tj = 25 °C | 6 | ||
| gate leakage current | IGSS | -2 | µA | VGS = -10 V; VDS = 0 V; Tj = 25 °C | 6 | ||
| drain-source on-state resistance | RDSon | 60 | 75 | mΩ | VGS = 10 V; ID = 3 A; Tj = 25 °C | 6 | |
| drain-source on-state resistance | RDSon | 114 | 143 | mΩ | VGS = 10 V; ID = 3 A; Tj = 175 °C | 6 | |
| drain-source on-state resistance | RDSon | 75 | 99 | mΩ | VGS = 4.5 V; ID = 2.6 A; Tj = 25 °C | 6 | |
| total gate charge | QG(tot) | 3.6 | 5 | nC | 6 | ||
| source-drain voltage | VSD | 0.8 | 1.2 | V | IS = 1.3 A; VGS = 0 V; Tj = 25 °C | 6 |
CAD (KiCad official)
- Symbol:
PMV60ENEAR - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
pmv60enear-etched.step/pmv60enear-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pmv60enear.step/pmv60enear.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (15 pp, sha256
b295706e79b65e1b, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PMV60ENEAR
**Nexperia** · MOSFETs · SOT-23
PMV60ENEAR from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate of the N-channel enhancement-mode MOSFET; the datasheet limits gate-source voltage VGS to -20 V to 20 V (Table 5). |
| 2 | S | passive | Source of the N-channel MOSFET; the datasheet gives a source current limit of 1.3 A at Tamb = 25 °C (Table 5). |
| 3 | D | passive | Drain of the N-channel MOSFET; the datasheet gives a drain-source voltage limit of 40 V and a continuous drain current of 3 A at Tamb = 25 °C with VGS = 10 V (Table 5). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| drain-source voltage | VDS | | | 40 | V | | 3 |
| gate-source voltage | VGS | -20 | | 20 | V | Tj = 25 °C | 3 |
| drain current | ID | | | 3 | A | VGS = 10 V; Tamb = 25 °C [1] | 3 |
| drain current | ID | | | 2.1 | A | VGS = 10 V; Tamb = 100 °C [1] | 3 |
| peak drain current | IDM | | | 12 | A | Tamb = 25 °C; single pulse; tp ≤ 10 µs | 3 |
| total power dissipation | Ptot | | | 615 | mW | Tamb = 25 °C [2] | 3 |
| total power dissipation | Ptot | | | 1.25 | W | [1] | 3 |
| total power dissipation | Ptot | | | 7.5 | W | Tsp = 25 °C | 3 |
| junction temperature | Tj | -55 | | 175 | °C | | 3 |
| ambient temperature | Tamb | -55 | | 175 | °C | | 3 |
| storage temperature | Tstg | -65 | | 175 | °C | | 3 |
| source current | IS | | | 1.3 | A | Tamb = 25 °C [1] | 3 |
| electrostatic discharge voltage | VESD | | | 1500 | V | HBM [3]; measured between all pins | 3 |
| non-repetitive drain-source avalanche energy | EDS(AL)S | | | 8.5 | mJ | Tj(init) = 25 °C; ID = 0.42 A; DUT in avalanche (unclamped) | 3 |
| thermal resistance from junction to ambient | Rth(j-a) | | 212 | 244 | K/W | in free air; [1] FR4 PCB, single-sided copper, standard footprint | 5 |
| thermal resistance from junction to ambient | Rth(j-a) | | 104 | 119 | K/W | in free air; [2] FR4 PCB, mounting pad for drain 6 cm2 | 5 |
| thermal resistance from junction to solder point | Rth(j-sp) | | 17 | 20 | K/W | | 5 |
| drain-source breakdown voltage | V(BR)DSS | 40 | | | V | ID = 250 µA; VGS = 0 V; Tj = 25 °C | 6 |
| gate-source threshold voltage | VGSth | 1 | 1.6 | 2.5 | V | ID = 250 µA; VDS = VGS; Tj = 25 °C | 6 |
| drain leakage current | IDSS | | | 1 | µA | VDS = 40 V; VGS = 0 V; Tj = 25 °C | 6 |
| gate leakage current | IGSS | | | 10 | µA | VGS = 20 V; VDS = 0 V; Tj = 25 °C | 6 |
| gate leakage current | IGSS | | | -10 | µA | VGS = -20 V; VDS = 0 V; Tj = 25 °C | 6 |
| gate leakage current | IGSS | | | 2 | µA | VGS = 10 V; VDS = 0 V; Tj = 25 °C | 6 |
| gate leakage current | IGSS | | | -2 | µA | VGS = -10 V; VDS = 0 V; Tj = 25 °C | 6 |
| drain-source on-state resistance | RDSon | | 60 | 75 | mΩ | VGS = 10 V; ID = 3 A; Tj = 25 °C | 6 |
| drain-source on-state resistance | RDSon | | 114 | 143 | mΩ | VGS = 10 V; ID = 3 A; Tj = 175 °C | 6 |
| drain-source on-state resistance | RDSon | | 75 | 99 | mΩ | VGS = 4.5 V; ID = 2.6 A; Tj = 25 °C | 6 |
| total gate charge | QG(tot) | | 3.6 | 5 | nC | | 6 |
| source-drain voltage | VSD | | 0.8 | 1.2 | V | IS = 1.3 A; VGS = 0 V; Tj = 25 °C | 6 |
## CAD (KiCad official)
- Symbol: `PMV60ENEAR`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `pmv60enear-etched.step` / `pmv60enear-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pmv60enear.step` / `pmv60enear.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588885371207208960) (15 pp, sha256 `b295706e79b65e1b`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pmv60enear-datasheet.pdf)