component
PL82052
Public Made by Adomby adom
POWLICON DC-DC Converters, ESOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "pl82052",
"version": "0.1.0",
"type": "component",
"description": "POWLICON DC-DC Converters, ESOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"power supply chip",
"pl82052",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"pl82052.kicad_sym",
"pl82052.kicad_mod",
"pl82052.glb",
"pl82052.step",
"pl82052.lbr",
"docs/hero.png",
"docs/pl82052-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"pl82052-hero.glb",
"pl82052-hero.overlay.json",
"pl82052-etched.glb"
],
"component": {
"mpn": "PL82052",
"manufacturer": "POWLICON",
"package": "ESOP-8",
"pin_count": 9,
"category": "Power Supply Chip",
"subcategory": "DC-DC Converters",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590340216008437760",
"parts": {
"symbol": "pl82052.kicad_sym",
"footprint": "pl82052.kicad_mod",
"model_3d": "pl82052-hero.glb",
"model_3d_plain": "pl82052-etched.glb",
"model_3d_step": "pl82052-etched.step",
"model_3d_step_plain": "pl82052.step",
"lbr": "pl82052.lbr"
},
"distributor_links": {
"lcsc": "C5150986"
},
"distributor_check": {
"checked_at": "2026-10-18T01:40:02Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "BST",
"type": "passive",
"description": "Boot-strap pin: connect a 0.1µF or greater capacitor between SW and BST to power the high-side gate driver; BST to SW is limited to -0.3 to 6.5 V (absolute maximum) and the datasheet recommends 0 to SW+5 V."
},
{
"number": "2",
"name": "VIN",
"type": "power_in",
"description": "Power input that supplies the IC; supply with 4.6 V to 33 V (absolute maximum VIN to GND is -0.3 to +40 V) and bypass to GND with a large capacitor plus at least 0.1 µF ceramic placed close to VIN and GND."
},
{
"number": "3",
"name": "ROSC",
"type": "passive",
"description": "Switching frequency program pin: connect a resistor to set the frequency (80 kHz to 2 MHz range), or leave open for 160 kHz switching frequency; absolute maximum is -0.3 to +6.5 V."
},
{
"number": "4",
"name": "SS",
"type": "passive",
"description": "Soft-start pin: an external capacitor connected to this pin sets the output rise time, with a 2 µA internal charge current and a recommended slow-start time of 10 ms to 100 ms; the SS voltage is limited to 0 to 5 V."
},
{
"number": "5",
"name": "FB",
"type": "input",
"description": "Output voltage feedback pin; the internal reference is 0.8 V (±1.5% initial accuracy) and FB voltage is limited to 0 to 5 V."
},
{
"number": "6",
"name": "COMP",
"type": "passive",
"description": "Error amplifier output and input to the PWM comparator; connect frequency compensation components to this pin, with voltage limited to 0 to 5 V."
},
{
"number": "7",
"name": "GND",
"type": "power_in",
"description": "Ground pin; connect input and output capacitor grounds to this pin and the PAD through localized top-side planes."
},
{
"number": "8",
"name": "SW",
"type": "output",
"description": "Power switching pin connected to the inductor switching node; SW to GND absolute maximum is -0.3 to +40 V and the recommended range is 0 to 33 V."
},
{
"number": "9",
"name": "GND",
"type": "power_in",
"description": "Listed in the pin table as a second ground pin (\"7,9 GND\"); the layout section refers to the GND pin and PAD, so this is likely the exposed thermal pad."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The pin table lists '7,9 GND', but ESOP-8 has only eight leads and the layout text refers to 'GND pi; Datasheet conflicts on the ROSC open-pin frequency: 160 kHz in the pin description and electrical ta; BST is an internally generated boot-strap supply node; the KiCad type was chosen as passive and coul"
],
"pages_sent": 14,
"cost_usd": 0.0572,
"at": "2026-10-18T01:36:46"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590340216008437760",
"pages": 14,
"sha256": "3504e54833c78b06",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 9,
"described": 9,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "pl82052.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.9,
4.9,
1.65
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "f1718a42c5ea007e8e2dd672ac39a1bb358ee4849bd53c42e21ce83e0e5df7a9",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "pl82052-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.9,
4.9,
1.65
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "3f8b3758c57163c7b9d5d28a71a3411f0405a47c15cb67dcf83380ad3ced417c",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}