# PJM20N60TE

**PJSEMI** · MOSFETs · TO-252

PJM20N60TE from PJSEMI, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate terminal of the MOSFET; gate-source voltage is rated at ±20 V (VGS) in the absolute maximum ratings. |
| 2 | Drain | passive | Drain terminal of the MOSFET; rated at 60 V drain-source voltage (VDS) and 20 A continuous drain current (ID) per the absolute maximum ratings. |
| 3 | Source | passive | Source terminal of the MOSFET; body diode forward current is rated at 20 A (IS) with forward voltage VSD of 1.2 V maximum at VGS=0V, IS=20A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | PJSEMI |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS |  |  | 60 | V |  | 1 |
| Gate-Source Voltage | VGS | -20 |  | 20 | V |  | 1 |
| Drain Current-Continuous | ID |  |  | 20 | A |  | 1 |
| Drain Current-Pulsed | IDM |  |  | 80 | A | Pulse width limited by maximum junction temperature (Note 1) | 1 |
| Single Pulse Avalanche Energy | EAS |  |  | 25 | mJ | TJ=25℃, VDD=30V, VG=10V, RG=25Ω, L=0.5mH, IAS=6.1A (Note 2) | 1 |
| Maximum Power Dissipation | PD |  |  | 27.7 | W |  | 1 |
| Junction Temperature | TJ |  |  | 150 | °C |  | 1 |
| Storage Temperature Range | TSTG | -55 |  | 150 | °C |  | 1 |
| Thermal Resistance, Junction-to-Case | RθJC |  |  | 4.5 | °C/W |  | 1 |
| Drain-Source Breakdown Voltage | V(BR)DSS | 60 |  |  | V | VGS=0V,ID=250μA | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | 1 | μA | VDS=60V,VGS=0V | 2 |
| Gate-Body Leakage Current | IGSS | -100 |  | 100 | nA | VGS=±20V,VDS=0V | 2 |
| Gate Threshold Voltage | VGS(th) | 1 | 1.5 | 2.5 | V | VDS=VGS,ID=250μA | 2 |
| Drain-Source On-Resistance | RDS(on) |  | 26 | 33 | mΩ | VGS=10V,ID=10A | 2 |
| Drain-Source On-Resistance | RDS(on) |  | 31 | 45 | mΩ | VGS=4.5V,ID=5A | 2 |
| Diode Forward Voltage | VSD |  |  | 1.2 | V | VGS=0V,IS=20A | 2 |
| Diode Forward Current | IS |  |  | 20 | A |  | 2 |

## CAD (KiCad official)

- Symbol: `PJM20N60TE`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `pjm20n60te-etched.step` / `pjm20n60te-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pjm20n60te.step` / `pjm20n60te.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [PJSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603548502056456192) (5 pp, sha256 `880a463a31133332`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/pjm20n60te-datasheet.pdf)