component
PJ9500M30SE
Public Made by Adomby adom
PJSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
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| viewers | 8d ago |
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| page.json | 8d ago |
| pj9500m30se-etched.glb | 8d ago |
| pj9500m30se-etched.step | 8d ago |
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PJ9500M30SE
PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
PJ9500M30SE from PJSEMI, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input; the datasheet gives a supply range of 1.8 V to 6 V, and a 1 µF ceramic input capacitor is recommended between VIN and GND placed close to the device. |
| 2 | GND | power_in | Ground reference pin; a wide copper trace is required for both VIN and GND per the datasheet's PCB layout guidance. |
| 3 | EN | input | Chip enable, active high: the regulator turns on when EN is above VIH (1.2 V min) and off when below VIL (0.9 V max); EN is internally pulled low to GND by a 1 MΩ resistor, and should be tied to VIN if the feature is not used. |
| 4 | NC | unconnected | No internal connection; the datasheet lists this pin as not connected. |
| 5 | VOUT | power_out | Regulated output voltage; the datasheet recommends a 1 µF to 10 µF output capacitor with ESR of 5 mΩ to 500 mΩ and X7R or X5R dielectric, and a maximum output current of 500 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PJSEMI |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 1.8 | 6 | V | 7 | ||
| Output Voltage Accuracy | ∆VOUT | -2 | 2 | % | VIN=5V, IOUT=10mA | 7 | |
| Line Regulation | ∆VLINE | 1 | 3 | mV | VIN=(VOUT+2V)~7V, IOUT=1mA | 7 | |
| Load Regulation | ∆VLOAD | 0.1 | 0.2 | mV/mA | VOUT=4V, IOUT=1~200mA | 7 | |
| Short Circuit Current | ISHORT | 120 | 150 | mA | VEN=VIN, VOUT Short to GND | 7 | |
| EN Input Threshold Logic Low | VIL | 0.9 | V | 7 | |||
| EN Input Threshold Logic High | VIH | 1.2 | V | 7 | |||
| Supply Voltage | 1.8 | 6 | V | 6 | |||
| Maximum Output Current | 500 | mA | 6 | ||||
| Operating Ambient Temperature | -40 | 125 | °C | 6 | |||
| VIN, VEN to GND Voltage (VIN) | VIN | -0.3 | 6 | V | 6 | ||
| VIN, VEN to GND Voltage (VEN) | VEN | -0.3 | 6 | V | 6 | ||
| VOUT to VIN Voltage | -0.3 | 5 | V | 6 | |||
| Maximum Load Current | 500 | mA | 6 | ||||
| Power Dissipation SOT-23-5 | 250 | mW | 6 | ||||
| Thermal Resistance, Junction-to-Ambient SOT-23-5 | 400 | °C/W | 6 | ||||
| Operating Ambient Temperature (absolute maximum table) | -40 | 125 | °C | 6 | |||
| Storage Temperature Range | -40 | 150 | °C | 6 | |||
| Lead Temperature | 300 | °C | 10S | 6 | |||
| ESD Voltage HBM | 4 | KV | HBM | 6 | |||
| ESD Voltage CDM | 200 | V | CDM | 6 |
CAD (KiCad official)
- Symbol:
PJ9500M30SE - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
pj9500m30se-etched.step/pj9500m30se-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pj9500m30se.step/pj9500m30se.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: PJSEMI datasheet (16 pp, sha256
d7709c00ce45adff, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).