# PJ54BM33SE

**PJSEMI** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

PJ54BM33SE from PJSEMI, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN/EN | power_in | Power input voltage (VIN) for the LDO; the pin is printed as VIN/EN in the pin-out drawing, and the functional table lists VIN as the power input, with the absolute maximum VIN to GND rated -0.3 to +55 V and the electrical input voltage range 3 to 45 V. |
| 2 | GND | power_in | Ground reference for the regulator; the input and output capacitors must be returned to this pin as close as possible to the device. |
| 3 | EN/VIN | input | Chip enable, active high; the datasheet notes this pin is high impedance, and absolute maximum EN to GND voltage is -0.3 to +55 V. The drawing labels this pin EN/VIN, so the EN/VIN assignment of pins 1 and 3 should be confirmed. |
| 4 | NC | unconnected | No internal connection. |
| 5 | VOUT | power_out | Regulated output voltage; absolute maximum VOUT to GND is -0.3 to +6 V and the output capacitor (minimum 10 µF ceramic, X7R or X5R) must be placed close to this pin and GND. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | PJSEMI |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 3 |  | 45 | V |  | 5 |
| Output Voltage Accuracy | ΔVOUT | -2 |  | 2 | % | VIN=12V, IOUT=10mA | 5 |
| Maximum Output Current | IOUT_Max | 300 | 350 |  | mA |  | 5 |
| Current Limit (row printed as 'Current Limit VIH') | VIH | 1 |  |  | V |  | 5 |
| VIN to GND Voltage | VIN | -0.3 |  | 55 | V |  | 4 |
| VOUT to GND Voltage | VOUT | -0.3 |  | 6 | V |  | 4 |
| VOUT to VIN Voltage | VOUT-VIN | -55 |  | 0.3 | V |  | 4 |
| EN to GND Voltage | EN | -0.3 |  | 55 | V |  | 4 |
| Power Dissipation |  |  |  | 400 | mW |  | 4 |
| Thermal Resistance, Junction-to-Ambient |  |  |  | 300 | °C/W |  | 4 |
| Operating Ambient Temperature | TA | -40 |  | 85 | °C |  | 4 |
| Junction Temperature | TJ |  |  | 150 | °C |  | 4 |
| Storage Temperature Range | TSTG | -40 |  | 150 | °C |  | 4 |
| ESD (HBM) |  |  |  | 4 | KV | HBM | 4 |
| Recommended minimum output capacitance | COUT | 10 |  |  | µF | ceramic; X7R or X5R temperature characteristic recommended | 8 |

## CAD (KiCad official)

- Symbol: `PJ54BM33SE`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `pj54bm33se-etched.step` / `pj54bm33se-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pj54bm33se.step` / `pj54bm33se.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [PJSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590923509659226112) (9 pp, sha256 `9d606d10633cada4`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/pj54bm33se-datasheet.pdf)